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Peter Anvin" , Paolo Bonzini , Len Brown , Borislav Petkov , Kyle Huey , Tom Lendacky Subject: Re: [PATCH v5 0/3] Support Perf Extension on AMD KVM guests Message-ID: <20180306210231.GC12128@flask> References: <7d5fbe31-e24c-8ec6-631e-6909bcef3430@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7d5fbe31-e24c-8ec6-631e-6909bcef3430@amd.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 06 Mar 2018 21:03:12 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 06 Mar 2018 21:03:12 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'rkrcmar@redhat.com' RCPT:'' Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-02-16 13:26-0600, Natarajan, Janakarajan: > On 2/5/2018 1:24 PM, Janakarajan Natarajan wrote: > > This patchset adds support for Perf Extension on AMD KVM guests. > > > > When perf runs on a guest with family = 15h || 17h, the MSRs that are > > accessed, when the Perf Extension flag is made available, differ from > > the existing K7 MSRs. The accesses are to the AMD Core Performance > > Extension counters which provide 2 extra counters and new MSRs for both > > the event select and counter registers. > > > > Since the new event select and counter MSRs are interleaved and K7 MSRs > > are contiguous, the logic to map them to the gp_counters[] is changed. > > > > This patchset has been tested with Family 17h and Opteron G1 guests. > > > > v1->v2: > > * Rearranged MSR #defines based on Boris's suggestion. > > > > v2->v3: > > * Changed the logic of mapping MSR to gp_counters[] index based on > > Boris's feedback. > > * Removed use of family checks based on Radim's feedback. > > * Removed KVM bugfix patch since it is already applied. > > > > v3->v4: > > * Rebased to latest KVM tree. > > > > v4->v5: > > * Removed conditional check when exposing Perf Extension flag to > > guests based on Radim's feedback. > > > > Janakarajan Natarajan (3): > > x86/msr: Add AMD Core Perf Extension MSRs > > x86/kvm: Add support for AMD Core Perf Extension in guest > > x86/kvm: Expose AMD Core Perf Extension flag to guests > > Are there any concerns regarding this patchset? No, looks ok! I have squashed the last patch, added a sanity BUILD_BUG_ON and applied to kvm/queue (until we're sure that [1/3] goes through the kvm tree), thanks.