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[209.132.180.67]) by mx.google.com with ESMTP id o81si13966862pfk.67.2018.03.07.08.13.34; Wed, 07 Mar 2018 08:13:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=i8LqY0HQ; dkim=fail header.i=@chromium.org header.s=google header.b=QaQHDvVV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933982AbeCGQMU (ORCPT + 99 others); Wed, 7 Mar 2018 11:12:20 -0500 Received: from mail-ua0-f196.google.com ([209.85.217.196]:34661 "EHLO mail-ua0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933723AbeCGQMO (ORCPT ); Wed, 7 Mar 2018 11:12:14 -0500 Received: by mail-ua0-f196.google.com with SMTP id m43so1766591uah.1 for ; Wed, 07 Mar 2018 08:12:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=+LETfjwECdK7g9vaI6mfNFOsE55MG4vnThx0J8yHIfU=; b=i8LqY0HQRgtbdIclGysORQuy1BMvJ70fR4GFmvF0SAaBpPjAuyAL9EXVo3gqIhxx00 c4WfzS3Vp9wL5TunMEWrD1o3vrYVNI7h7DNCcX47UI44fGHS64beIKQI8WlAx5hBXs9A rS8n9kow2QT0wqPS//f3gRl6UaerZcDSc82mLirvf8RnBlGlPrfwJ7qsZmz4vO1kVlrH Xq/6VhgNTP2uGZmdiI3JO6njKfBOKaeGHOM0pbblkbBVLH1LzeKyLhodUR/ocBnM5ogF dbWp/vKmqwdyq007KD2JAY1ng3PxxH2/Wejo2S7djXyl+miKa22XhUp4YxrajimbmVYI abog== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=+LETfjwECdK7g9vaI6mfNFOsE55MG4vnThx0J8yHIfU=; b=QaQHDvVVSxJOuo2qe1++OR4CQGglz4xrYuwBfgkF3Lqbf/HDbbkhS0y+3S9QyUSSCM R787kRxqYD5uJb5Qyo+OjgnMz0ANUmN6UoNrGOLZ/jdbakfbyUakJWNg1s1Hio8Wz9na XMLulO2mGI/gD2yY9HBVTK0IrkrcZFc5Euo84= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=+LETfjwECdK7g9vaI6mfNFOsE55MG4vnThx0J8yHIfU=; b=Q/nOKouwjwwq9YzukM4vtZpmFjmouvmm7/Qj99r+S8tsUY6QZ/zlyC1nshwfAfRnNy KB64fAlV4iVciFABIVkQdMyMqQAGjXuu/0/VM0MxFvEf/PUM/Ty635JeW5SqDx5hW96v GaUwLBvEE5r3RApGwJOJshSEzs/aa6aU7fpg6qRLnJspqlJQ2mieqAKKSO0M3eHU2Flw 9w3YsHAiBaa7qfnuPuMy7Dmc6aBFH5L1CbnLMPBZXYv0i8hSKfVHvqDf22CwWTG/jdXo yHnJCy9zL+OuDXGdgToaep51ZUs9ZJ5bJANjGu+WwzCTiuevJP0FD0wivN/81UfmVn6K mYQw== X-Gm-Message-State: APf1xPBWCvwc//dhjD4KNy8iE3NST+ELexB9Cm56qSUrwMbaEVUUJu12 WNH81b3+PkKToIiamGHrD2OeQP8izg/zgFBiXESNzg== X-Received: by 10.159.49.27 with SMTP id m27mr17067316uab.169.1520439132815; Wed, 07 Mar 2018 08:12:12 -0800 (PST) MIME-Version: 1.0 Received: by 10.31.254.65 with HTTP; Wed, 7 Mar 2018 08:12:12 -0800 (PST) In-Reply-To: References: <1518415278-59062-1-git-send-email-vviswana@codeaurora.org> <1518415278-59062-2-git-send-email-vviswana@codeaurora.org> <19cc8cdf-3c75-5bde-08b2-34c4f4a2d5fa@redhat.com> From: Doug Anderson Date: Wed, 7 Mar 2018 08:12:12 -0800 X-Google-Sender-Auth: 0cJrHIUlH7rx6p4e2ByuZXaVUi8 Message-ID: Subject: Re: [PATCH V2 1/2] mmc: sdhci-msm: Add support to store supported vdd-io voltages To: Vijay Viswanath Cc: Jeremy McNicoll , Adrian Hunter , Ulf Hansson , linux-mmc@vger.kernel.org, LKML , Shawn Lin , linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org, asutoshd@codeaurora.org, stummala@codeaurora.org, venkatg@codeaurora.org, pramod.gurav@linaro.org, jeremymc@redhat.com, evgreen@chromium.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue, Mar 6, 2018 at 11:13 PM, Vijay Viswanath wrote: > Hi Dough, Jeremy, > > > On 3/3/2018 4:38 AM, Jeremy McNicoll wrote: >> >> On 2018-03-02 10:23 AM, Doug Anderson wrote: >>> >>> Hi, >>> >>> On Sun, Feb 11, 2018 at 10:01 PM, Vijay Viswanath >>> wrote: >>>> >>>> During probe check whether the vdd-io regulator of sdhc platform device >>>> can support 1.8V and 3V and store this information as a capability of >>>> platform device. >>>> >>>> Signed-off-by: Vijay Viswanath >>>> --- >>>> drivers/mmc/host/sdhci-msm.c | 38 >>>> ++++++++++++++++++++++++++++++++++++++ >>>> 1 file changed, 38 insertions(+) >>>> >>>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c >>>> index c283291..5c23e92 100644 >>>> --- a/drivers/mmc/host/sdhci-msm.c >>>> +++ b/drivers/mmc/host/sdhci-msm.c >>>> @@ -23,6 +23,7 @@ >>>> #include >>>> >>>> #include "sdhci-pltfm.h" >>>> +#include >>> >>> >>> This is a strange sort order for this include file. Why is it after >>> the local include? >>> >>> >>>> #define CORE_MCI_VERSION 0x50 >>>> #define CORE_VERSION_MAJOR_SHIFT 28 >>>> @@ -81,6 +82,9 @@ >>>> #define CORE_HC_SELECT_IN_HS400 (6 << 19) >>>> #define CORE_HC_SELECT_IN_MASK (7 << 19) >>>> >>>> +#define CORE_3_0V_SUPPORT (1 << 25) >>>> +#define CORE_1_8V_SUPPORT (1 << 26) >>>> + >>> >>> >>> Is there something magical about 25 and 26? This is a new caps field, >>> so I'd have expected 0 and 1. >>> >>> > > Yes, these bits are the same corresponding to the capabilities in the > Capabilities Register (offset 0x40). The bit positions become important when > capabilities register doesn't show support to some voltages, but we can > support those voltages. At that time, we will have to fake capabilities. The > changes for those are currently not yet pushed up. > > >>>> #define CORE_CSR_CDC_CTLR_CFG0 0x130 >>>> #define CORE_SW_TRIG_FULL_CALIB BIT(16) >>>> #define CORE_HW_AUTOCAL_ENA BIT(17) >>>> @@ -148,6 +152,7 @@ struct sdhci_msm_host { >>>> u32 curr_io_level; >>>> wait_queue_head_t pwr_irq_wait; >>>> bool pwr_irq_flag; >>>> + u32 caps_0; >>>> }; >>>> >>>> static unsigned int msm_get_clock_rate_for_bus_mode(struct sdhci_host >>>> *host, >>>> @@ -1313,6 +1318,35 @@ static void sdhci_msm_writeb(struct sdhci_host >>>> *host, u8 val, int reg) >>>> sdhci_msm_check_power_status(host, req_type); >>>> } >>>> >>>> +static int sdhci_msm_set_regulator_caps(struct sdhci_msm_host >>>> *msm_host) >>>> +{ >>>> + struct mmc_host *mmc = msm_host->mmc; >>>> + struct regulator *supply = mmc->supply.vqmmc; >>>> + int i, count; >>>> + u32 caps = 0, vdd_uV; >>>> + >>>> + if (!IS_ERR(mmc->supply.vqmmc)) { >>>> + count = regulator_count_voltages(supply); >>>> + if (count < 0) >>>> + return count; >>>> + for (i = 0; i < count; i++) { >>>> + vdd_uV = regulator_list_voltage(supply, i); >>>> + if (vdd_uV <= 0) >>>> + continue; >>>> + if (vdd_uV > 2700000) >>>> + caps |= CORE_3_0V_SUPPORT; >>>> + if (vdd_uV < 1950000) >>>> + caps |= CORE_1_8V_SUPPORT; >>>> + } >>> >>> >>> Shouldn't you be using regulator_is_supported_voltage() rather than >>> open coding? Also: I've never personally worked on a device where it >>> was used, but there is definitely a concept floating about of a >>> voltage level of 1.2V. Maybe should copy the ranges from >>> mmc_regulator_set_vqmmc()? >>> >>> > > regulator_is_supported_voltage() checks for a range and it also uses > regulator_list_voltage() internally. regulator_list_voltage() is also an > exported API for use by drivers AFAIK. Please correct if it is not. Sure, regulator_list_voltage() is valid to call. I'm not saying that your code is wrong or violates abstractions, just that it's essentially re-implementing regulator_is_supported_voltage() for very little gain. Calling regulator_is_supported_voltage() is better because: 1. In theory, it should generate less code. Sure, it might loop twice with the current implementation of regulator_is_supported_voltage(), but for a non-time-critical section like this smaller code is likely better than faster code (decreases kernel size / uses up less cache space, etc). 2. If regulator_is_supported_voltage() is ever improved to be more efficient you'll get that improvement automatically. If someone happened to source vqmmc from a PWM regulator, for instance, trying to enumerate all voltages like this would be a disaster. 3. Code will be simpler to understand. You can replace your whole loop with: if (regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, 1950000)) caps |= CORE_1_8V_SUPPORT if (regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, 3600000)) caps |= CORE_3_0V_SUPPORT >>> Also: seems like you should have some way to deal with "caps" ending >>> up w/ no bits set. IIRC you can have a regulator that can be enabled >>> / disabled but doesn't list a voltage, so if someone messed up their >>> device tree you could end up in this case. Should you print a >>> warning? ...or treat it as if we support "3.0V"? ...or ? I guess it >>> depends on how do you want patch #2 to behave in that case. >> >> >> Both, initialize it to sane value and print something. This way at >> least you have a good chance of booting and not hard hanging and you >> are given a reasonable message indicating what needs to be fixed. >> >> -jeremy >> >>> >>> >>>> + } >>> >>> >>> How should things behave if vqmmc is an error? In that case is it >>> important to not set "CORE_IO_PAD_PWR_SWITCH_EN" in patch set #2? >>> ...or should you set "CORE_IO_PAD_PWR_SWITCH_EN" but then make sure >>> you don't set "CORE_IO_PAD_PWR_SWITCH"? >>> >>> > > Thanks for the suggestion. If the regulators exit and doesn't list the > voltages, then I believe initialization itself will not happen. We will not > have any available ocr and in sdhci_setup_host it should fail. > But these enhancements can be incorporated. Since this patch is already > acknowledged, I will incorporate these changes in a subsequent patch. It's already acknowledged? I saw that your RFC was acknowledged by Adrian Hunter but then you didn't include that tag in the posting of v2, so I assumed for some reason it no longer applied. If you're thinking that Ulf would be the one to apply this patch, he probably doesn't know that it's Acked either. Perhaps Adrian or Ulf can give direction for how they see this patch proceeding. >>>> + msm_host->caps_0 |= caps; >>>> + pr_debug("%s: %s: supported caps: 0x%08x\n", mmc_hostname(mmc), >>>> + __func__, caps); >>>> + >>>> + return 0; >>>> +} >>>> + >>>> + >>>> static const struct of_device_id sdhci_msm_dt_match[] = { >>>> { .compatible = "qcom,sdhci-msm-v4" }, >>>> {}, >>>> @@ -1530,6 +1564,10 @@ static int sdhci_msm_probe(struct platform_device >>>> *pdev) >>>> ret = sdhci_add_host(host); >>>> if (ret) >>>> goto pm_runtime_disable; >>>> + ret = sdhci_msm_set_regulator_caps(msm_host); >>>> + if (ret) >>>> + dev_err(&pdev->dev, "%s: Failed to set regulator caps: >>>> %d\n", >>>> + __func__, ret); >>> >>> >>> Why do you need __func__ here? You're already using dev_err(), that >>> gives an idea of where we are. >>> > > dev_err() doesn't give information of where it is getting called. It gives you the driver and the error message should be unique to the driver and easy to find. Including "__func__ in messages like this is discouraged unless you are in a context where you somehow can't get access to the device pointer. I suppose ultimately it's up the the maintainer for individual cases but overall I've seen this to be a consistently applied rule in the kernel. In any case, why would this particular print be special that it should include __func__ but all others (in this file, or in dev_err in general) shouldn't? >>>> pm_runtime_mark_last_busy(&pdev->dev); >>>> pm_runtime_put_autosuspend(&pdev->dev); >>>> -- >>>> Qualcomm India Private Limited, on behalf of Qualcomm Innovation >>>> Center, Inc. >>>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a >>>> Linux Foundation Collaborative Project. >>>> >>>> -- >>>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in >>>> the body of a message to majordomo@vger.kernel.org >>>> More majordomo info at http://vger.kernel.org/majordomo-info.html >> >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > > > Thanks, > Vijay