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[209.132.180.67]) by mx.google.com with ESMTP id y3-v6si10464429plk.707.2018.03.07.12.25.55; Wed, 07 Mar 2018 12:26:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965032AbeCGUYB (ORCPT + 99 others); Wed, 7 Mar 2018 15:24:01 -0500 Received: from mail.kernel.org ([198.145.29.99]:56622 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964783AbeCGUX6 (ORCPT ); Wed, 7 Mar 2018 15:23:58 -0500 Received: from mail-qk0-f172.google.com (mail-qk0-f172.google.com [209.85.220.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 469312177B for ; Wed, 7 Mar 2018 20:23:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 469312177B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=robh+dt@kernel.org Received: by mail-qk0-f172.google.com with SMTP id d206so4237477qkb.3 for ; Wed, 07 Mar 2018 12:23:58 -0800 (PST) X-Gm-Message-State: AElRT7FxpU2iXAcMiLsxDdyDQUN6tCIdDAOnDltsAwosrKWJLb6kmpQG N2xJ/RDwt2era2CTq9ApmLEynHEPscOy6o4p7Q== X-Received: by 10.55.109.196 with SMTP id i187mr33246426qkc.29.1520454237430; Wed, 07 Mar 2018 12:23:57 -0800 (PST) MIME-Version: 1.0 Received: by 10.12.178.131 with HTTP; Wed, 7 Mar 2018 12:23:36 -0800 (PST) In-Reply-To: <3a0359afad71abc0c0d682bfcd0dd66055f5d7e5.1520450752.git.ivan.gorinov@intel.com> References: <3a0359afad71abc0c0d682bfcd0dd66055f5d7e5.1520450752.git.ivan.gorinov@intel.com> From: Rob Herring Date: Wed, 7 Mar 2018 14:23:36 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 3/4] of: Documentation: Add x86 local APIC ID property To: Ivan Gorinov Cc: Thomas Gleixner , Linux Kernel Mailing List , Ingo Molnar , Mark Rutland Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 7, 2018 at 1:47 PM, Ivan Gorinov wrote: > Current x86 Device Tree implementation does not support multiprocessing. > Add new "intel,apic-id" property to allow using CPU descriptions > in Device Tree data provided by the U-Boot loader. > Address specified in 'reg' to be used as default local APIC ID > to avoid breaking existing systems with DTB provided by firmware. Is there some reason to not always use reg? For when the numbering of cpus and timers is different? Of course, we do have the situation on ARM with the GIC that the GIC CPU IDs may be > > Signed-off-by: Ivan Gorinov > --- > Documentation/devicetree/bindings/x86/ce4100.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt b/Documentation/devicetree/bindings/x86/ce4100.txt > index b49ae59..d15de48 100644 > --- a/Documentation/devicetree/bindings/x86/ce4100.txt > +++ b/Documentation/devicetree/bindings/x86/ce4100.txt > @@ -14,11 +14,17 @@ The CPU node > compatible = "intel,ce4100"; > reg = <0>; > lapic = <&lapic0>; Isn't this enough? I can't tell because whatever this points to has no binding documentation. You could perhaps extend it and add a cell with the id value. > + intel,apic-id = <0>; > }; > > The reg property describes the CPU number. The lapic property points to > the local APIC timer. > > +Optional properties: > + > +- intel,apic-id: local APIC ID. > + The address specified in "reg" is used as default local APIC ID. > + > The SoC node > ------------ > > -- > 2.7.4 >