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[216.188.254.6]) by smtp.gmail.com with ESMTPSA id h17sm8428587otc.55.2018.03.07.13.35.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 07 Mar 2018 13:35:30 -0800 (PST) Date: Wed, 7 Mar 2018 15:35:14 -0600 From: Rob Herring To: sibis Cc: bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, georgi.djakov@linaro.org, jassisinghbrar@gmail.com, p.zabel@pengutronix.de, ohad@wizery.com, mark.rutland@arm.com, kyan@codeaurora.org, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller Message-ID: <20180307213514.4sv7ucxo25jpomz3@rob-hp-laptop> References: <1520243613-30393-1-git-send-email-sibis@codeaurora.org> <1520243613-30393-2-git-send-email-sibis@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1520243613-30393-2-git-send-email-sibis@codeaurora.org> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 05, 2018 at 03:23:28PM +0530, sibis wrote: > Add reset controller driver for Qualcomm SDM845 SoC to > control reset signals provided by AOSS for Modem, Venus > ADSP, GPU, Camera, Wireless, Display subsystem > > Signed-off-by: sibis Need a full name here. > --- > .../devicetree/bindings/reset/qcom,aoss-reset.txt | 54 ++++++++ Separate patch for bindings (with the header) please. > drivers/reset/Kconfig | 10 ++ > drivers/reset/Makefile | 1 + > drivers/reset/reset-qcom-aoss.c | 151 +++++++++++++++++++++ > include/dt-bindings/reset/qcom,aoss-sdm845.h | 17 +++ > 5 files changed, 233 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > create mode 100644 drivers/reset/reset-qcom-aoss.c > create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h > > diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > new file mode 100644 > index 0000000..5318e14 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > @@ -0,0 +1,54 @@ > +Qualcomm AOSS Reset Controller > +====================================== > + > +This binding describes a reset-controller found on AOSS (Always on SubSysem) > +for Qualcomm SDM845 SoCs. > + > +Required properties: > +- compatible: > + Usage: required > + Value type: > + Definition: must be: > + "qcom,aoss-reset-sdm845", "syscon" Someone in QCom needs to go fix the order of all your downstream compatibles or review your bindings before sending upstream. The standard ordering is ,-. Why syscon? The description is this is just a reset controller. > + > +- reg: > + Usage: required > + Value type: > + Definition: must specify the base address and size of the > + syscon device. > + > + > +- #reset-cells: > + Usage: required > + Value type: > + Definition: must be 1; cell entry represents the reset index. > + > +example: > + > +aoss_reset: qcom,reset-controller@b2e0100 { > + compatible = "qcom,aoss-reset-sdm845", "syscon"; > + reg = <0xc2b0000 0x20004>; > + #reset-cells = <1>; > +}; > + > + > +Specifying reset lines connected to IP modules > +============================================== > + > +Device nodes that need access to reset lines should > +specify them as a reset phandle in their corresponding node as > +specified in reset.txt. > + > +Example: > + > + modem-pil@4080000 { > + ... > + > + resets = <&aoss_reset AOSS_CC_MSS_RESTART>; > + reset-names = "mss_restart"; > + > + ... > + }; > + > +For list of all valid reset indicies see > + Put this before the example.