Received: by 10.223.185.116 with SMTP id b49csp5868598wrg; Wed, 7 Mar 2018 20:36:38 -0800 (PST) X-Google-Smtp-Source: AG47ELuWNzDPsiH6TcyWAA4IeUWsPk6NerKHrHcOaatpKWsbXfeRy2/cYRPO2dk2ioMvQ810GHbk X-Received: by 10.98.206.1 with SMTP id y1mr25014385pfg.196.1520483798358; Wed, 07 Mar 2018 20:36:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520483798; cv=none; d=google.com; s=arc-20160816; b=ZFOs9pJlk6e9RvWRipaSAKKLKti1odusPzNjvURaE++IeBvNbqQ6amDToViOURx6UG kBfN4uraga76fvR0RHY+HDXPaDZT/MYOC/vxldOb6ba4xeFCHim0/QjKlkFR6b3Igx10 CUsj+GTih4kEDez5Xu1bRzBSlwqnSG87Oi76ueW3dmI7rGJe9mHKtZFwKRXcN5zwZTM8 1GWwVkpjRlP42CiOAznovDLjPlOG/AhHqLTmuxqf2RQPZEBpJETN0k/iMdRt6qja1fpI p9NYLV9DBxab3k+R5hZ9nTbovd+lKGPGPYqQTtLKCNPea0n1z+RG/WO6BflEH9OOocSc rKDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=KNp6qSgGoMW/6vZhfmCx6gTxZjO0BQ0DCo8oyDmh5Kk=; b=J1wcrRShphXiUYXbvbH44mm0Tu+cxoyrtTEofZtsIqDcyhAMASoEyIUPg2pGcmIXPW eXjaPmty9FFSNPJHaM2WgsPJkwuYE+gfYdAx7X2ijNqvt+c7Axi4nXtRSranJgqDqizL vKYMiX4RaYwtOf6W8di/UWUFt/wrW1tdUAsXml+BsSWLGYv4dYQ4etz/KJv6op2U8G0M 9wbl1/mHJKYR8ADv9Xxgkv6Jj8a8ejk+yiWbcx5CPM+jKrkSMbvGZF36L9xj1NdtwGMB HYXPX1DRzQaZ04gYn4NXtL/+ZR7/g9k12/Xilh7J9SZH0929Nur/o43X1r/ww7+xa+GY MKzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=DmxZm9U2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x13si12465334pgc.75.2018.03.07.20.36.23; Wed, 07 Mar 2018 20:36:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=DmxZm9U2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755036AbeCHEd5 (ORCPT + 99 others); Wed, 7 Mar 2018 23:33:57 -0500 Received: from mail-ua0-f194.google.com ([209.85.217.194]:45311 "EHLO mail-ua0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753901AbeCHEdz (ORCPT ); Wed, 7 Mar 2018 23:33:55 -0500 Received: by mail-ua0-f194.google.com with SMTP id n24so3058050ual.12 for ; Wed, 07 Mar 2018 20:33:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=KNp6qSgGoMW/6vZhfmCx6gTxZjO0BQ0DCo8oyDmh5Kk=; b=DmxZm9U2kDllzuWjOv9Jc/pq5mLZz118m1Ozd05DcXUHvBJiAZfax1AsIbruiobQC2 +Rml/7VZpZhEO5t/MKy81PfSR5XkK9K0lYN81iX1mLAPMyfhJr/huZfWTXbyFXOXGSQr wv0dGmmh1kbRS8Dliih/uEzkKb1ueZTG/MOjg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=KNp6qSgGoMW/6vZhfmCx6gTxZjO0BQ0DCo8oyDmh5Kk=; b=oY5u9Pl8gACROyjYtQSZVtAkmD8wIC5lxcv9yRgn6n/PxWFqcBrdYGX4RygVkVQcpZ 5FdJoiW0kmwEEBKxwmA/B8QTl/zqStJUEC92r7xzR+W8uSap8WQ5/igVotgkti2mlsOl 0DptApo0jqFfpTeZl+8r36jUs5CbwGXEJsiIXGELEXLw/CQCWdA+Oku+yhCBHWz3SRcX +pv2XuzKFOLGJ1aL0iNT4fzg8d5jvESGzPNfkGiASVH6dGuHOw6D/qCkLbmAD+PXuUsf hiTUiCq5cOGQ5sAgSpOuI+JaQCOC9q96qpbw1OYvsMuxRzSpU0z9SVAJQeuokA13Yo1r jZjQ== X-Gm-Message-State: APf1xPDBi9IGwsE/zQe1pMYu7Efd/qn6+R5bBJSEN0gEGQu3XeDAjtVz klT8lgdKUhvfvQTg3JYzeAn28pO9SZQ= X-Received: by 10.176.85.220 with SMTP id w28mr18362227uaa.145.1520483634100; Wed, 07 Mar 2018 20:33:54 -0800 (PST) Received: from mail-ua0-f174.google.com (mail-ua0-f174.google.com. [209.85.217.174]) by smtp.gmail.com with ESMTPSA id w200sm4093835vkw.20.2018.03.07.20.33.52 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Mar 2018 20:33:52 -0800 (PST) Received: by mail-ua0-f174.google.com with SMTP id c14so3066858uak.7 for ; Wed, 07 Mar 2018 20:33:52 -0800 (PST) X-Received: by 10.159.52.101 with SMTP id s37mr18397024uab.24.1520483631632; Wed, 07 Mar 2018 20:33:51 -0800 (PST) MIME-Version: 1.0 Received: by 10.176.0.99 with HTTP; Wed, 7 Mar 2018 20:33:31 -0800 (PST) In-Reply-To: <30a2fa5e-3d8e-acb6-ab31-bec652f1be99@arm.com> References: <20180302101050.6191-1-vivek.gautam@codeaurora.org> <20180302101050.6191-4-vivek.gautam@codeaurora.org> <30a2fa5e-3d8e-acb6-ab31-bec652f1be99@arm.com> From: Tomasz Figa Date: Thu, 8 Mar 2018 13:33:31 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v8 3/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device To: Robin Murphy Cc: Vivek Gautam , Joerg Roedel , Rob Herring , Mark Rutland , "Rafael J. Wysocki" , Will Deacon , Rob Clark , "open list:IOMMU DRIVERS" , devicetree@vger.kernel.org, Linux Kernel Mailing List , jcrouse@codeaurora.org, Stephen Boyd , Sricharan R , Marek Szyprowski , Archit Taneja , linux-arm-msm Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 8, 2018 at 1:58 AM, Robin Murphy wrote: > On 07/03/18 13:52, Tomasz Figa wrote: >> >> On Wed, Mar 7, 2018 at 9:38 PM, Robin Murphy wrote: >>> >>> On 02/03/18 10:10, Vivek Gautam wrote: >>>> >>>> >>>> From: Sricharan R >>>> >>>> The smmu device probe/remove and add/remove master device callbacks >>>> gets called when the smmu is not linked to its master, that is without >>>> the context of the master device. So calling runtime apis in those >>>> places >>>> separately. >>>> >>>> Signed-off-by: Sricharan R >>>> [vivek: Cleanup pm runtime calls] >>>> Signed-off-by: Vivek Gautam >>>> --- >>>> drivers/iommu/arm-smmu.c | 96 >>>> ++++++++++++++++++++++++++++++++++++++++++++---- >>>> 1 file changed, 88 insertions(+), 8 deletions(-) >>>> >>>> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >>>> index c8b16f53f597..3d6a1875431f 100644 >>>> --- a/drivers/iommu/arm-smmu.c >>>> +++ b/drivers/iommu/arm-smmu.c >>>> @@ -209,6 +209,8 @@ struct arm_smmu_device { >>>> struct clk_bulk_data *clks; >>>> int num_clks; >>>> + bool rpm_supported; >>>> + >>> >>> >>> >>> Can we not automatically infer this from whether clocks and/or power >>> domains >>> are specified or not, then just use pm_runtime_enabled() as the fast-path >>> check as Tomasz originally proposed? >> >> >> I wouldn't tie this to presence of clocks, since as a next step we >> would want to actually control the clocks separately. (As far as I >> understand, on QCom SoCs we might want to have runtime PM active for >> the translation to work, but clocks gated whenever access to SMMU >> registers is not needed.) Moreover, you might still have some super >> high scale thousand-core systems that require clocks to be >> prepare-enabled, but runtime PM would be undesirable for the reasons >> we discussed before. >> >>> >>> I worry that relying on statically-defined matchdata is just going to >>> blow >>> up the driver and DT binding into a maintenance nightmare; I really don't >>> want to start needing separate definitions for e.g. >>> "arm,juno-etr-mmu-401" >>> and "arm,juno-hdlcd-mmu-401" just because one otherwise-identical >>> instance >>> within the SoC is in a separate controllable power domain while the >>> others >>> aren't. >> >> >> I don't see a reason why both couldn't just have RPM supported >> regardless of whether there is a real power domain. It would >> effectively be just a no-op for those that don't have one. > > > Because you're then effectively defining "compatible" values for the sake of > attaching software policy to them, rather than actually describing different > hardware implementations. > > The fact that RPM can't do anything meaningful unless relevant clock/power > aspects *are* described, however, means that we shouldn't need additional > information redundant with that. Much like the fact that we don't *already* > have an "arm,juno-hdlcd-mmu-401" compatible to account for those being > integrated such that IDR0.CTTW has the wrong value, since the presence or > not of the "dma-coherent" property already describes the truth in that > regard. Fair enough. > >> IMHO the >> only reason to avoid having the RPM enabled is the scalability issue >> we discussed before. > > > Yes, but that's kind of my point; in reality high throughput/minimal latency > and aggressive power management are more or less mutually exclusive. Mobile > SoCs with fine-grained clock trees and power domains won't have multiple > 40GBe/NVMf/whatever links running flat out in parallel; conversely > networking/infrastructure/server SoCs aren't designed around saving every > last microamp of leakage current - even in the (fairly unlikely) case of the > interconnect clocks being software-gateable at all I would be very surprised > if that were ever exposed directly to Linux (FWIW I believe ACPI essentially > *requires* clocks to be abstracted behind firmware). > > Realistically then, explicit clocks are only expected on systems which care > about power management. We can always revisit that assumption if anything > crazy where it isn't the case ever becomes non-theoretical, but for now it's > one I'm entirely comfortable with. If on the other hand it turns out that we > can rely on just a power domain being present wherever we want RPM, making > clocks moot, then all the better. Alright. Since Qcom would be the only user of clock and power handling for the time being, I think checking power domain presence could work for us. +/- the fact that clocks need to be handled even if power domain is not present, but we should normally always have both. Now we need a way to do the check. Perhaps for the time being it would be enough to just check for the power-domains property in DT? Best regards, Tomasz