Received: by 10.223.185.116 with SMTP id b49csp6372427wrg; Thu, 8 Mar 2018 06:27:27 -0800 (PST) X-Google-Smtp-Source: AG47ELt3m6UOKfrg6Hm6DCxaod3z7n/QeRjayDCwt8rJkfwtuKTH9iZ/fJDIiJFw6X/1F2Xf6aaq X-Received: by 10.99.102.5 with SMTP id a5mr21327452pgc.452.1520519247103; Thu, 08 Mar 2018 06:27:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520519247; cv=none; d=google.com; s=arc-20160816; b=eaV39FNqc0MjtBLnl2ABN+kc7IgTfPbf+tpHSLwtqngaR4NbWT6blbyKiM5Lf6JOPT DvBBbbPOpNpufue9SO/O3nWeS+VsnBHTbFr/QvqktPrkeyzgLPbFsOu/iSZoH//jHdSd MoyVpPg+1bssXnUyRT67tgrh7W0veXRzKn42QOR2/HvwfmJD1Lwowdq7UaEqAmUET3gP E54a8gYgiX7/sJ+pUQj3uHAK0ErUba3VlTTSvr3+cBY3qfpKau9VRlx/8LF1cqfFdcY9 XV7Cm7v6sZ4BSI6jjOW/Bjet8cyRwCTxwCd6Gzn5ziSEhUVTTAdA9CiNxrJntqQy4Vek nSXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-id:mime-version:user-agent :references:message-id:in-reply-to:subject:cc:to:from:date :arc-authentication-results; bh=TJcSpRToSNiYqbvPREsAMfXEplCkNm17dsBLAmEl26E=; b=Uo228pemO30DHnWfHOSjO1IHNmerb65JYlW4FHR/SiRinUgk9bFWNXgl9RCar0Ri6B 65RHodNxPOa9nNEYAnMrhNyA+5sf2K3jGmDsxADsvTd41Xnh2O8gSOi4pdPCOCUGa+v0 6us+gmRU0XEMHX90qVr2nY6Qt3eucBykrlhCIwem1oefr4KXH2JBfr5VRZr7YpRgMqxc MGv3EVVMf/+iJm/OgrVpJS7AP9znn6XKWHKT1Cmte+6ISyJgrc/PNXBKYohl6c+/EGeG K19P0fAdi0kaHKC1f1fsCQep2p8z/3uDKfKafdH2SlsTuyrmssnjXwN08KcfW9+bYPp2 7FyQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j13si13023616pgv.110.2018.03.08.06.27.12; Thu, 08 Mar 2018 06:27:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935589AbeCHO0R (ORCPT + 99 others); Thu, 8 Mar 2018 09:26:17 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:38888 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933489AbeCHO0Q (ORCPT ); Thu, 8 Mar 2018 09:26:16 -0500 Received: from hsi-kbw-5-158-153-52.hsi19.kabel-badenwuerttemberg.de ([5.158.153.52] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1etwUO-0002pg-RB; Thu, 08 Mar 2018 15:25:48 +0100 Date: Thu, 8 Mar 2018 15:25:48 +0100 (CET) From: Thomas Gleixner To: Rajvi Jingar cc: mingo@redhat.com, hpa@zytor.com, x86@kernel.org, peterz@infradead.org, linux-kernel@vger.kernel.org, christopher.s.hall@intel.com Subject: Re: [PATCH v2] x86/tsc: Convert ART in nanoseconds to TSC. In-Reply-To: <1520354849-32593-1-git-send-email-rajvi.jingar@intel.com> Message-ID: References: <1520354849-32593-1-git-send-email-rajvi.jingar@intel.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-615922065-1520518841=:8662" Content-ID: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-615922065-1520518841=:8662 Content-Type: text/plain; CHARSET=UTF-8 Content-Transfer-Encoding: 8BIT Content-ID: On Tue, 6 Mar 2018, Rajvi Jingar wrote: > Device drivers use get_device_system_crosststamp() to produce precise > system/device cross-timestamps. The PHC clock and ALSA interfaces, > for example, make the cross-timestamps available to user applications. > On Intel platforms, get_device_system_crosststamp() requires a TSC > value derived from ART (Always Running Timer) to compute the monotonic > raw and realtime system timestamps. > > Starting with Intel Goldmont platforms, the PCIe root complex supports > the PTM time sync protocol. PTM requires all timestamps to be in units > of nanoseconds. The Intel root complex hardware propagates system time – > derived from ART - in units of nanoseconds performing the conversion > as follows: > > ART_NS = ART * 1e9 / > > When user software requests a cross-timestamp, the system timestamps > (generally read from device registers) must be converted to TSC by > the driver software as follows: > > TSC = ART_NS * TSC_KHZ / 1e6 > > This is valid when CPU feature flag X86_FEATURE_TSC_KNOWN_FREQ is set > indicating the tsc_khz is derived from CPUID[15H]. Drivers should > check that this flag is set before conversion to TSC is attempted. Clear and coherent changelog. Well done! > Changes from v1: > > * use existing frequency hardcode for platforms where CPUID[15H].ECX == 0 > (v1 added redundant hardcode just for the ART.ns conversion) > > * use tsc_khz for TSC conversion, also requires driver to check > X86_FEATURE_TSC_KNOWN_FREQ (v1 used CPUID[15H].ECX value directly) Maintainer lazyness request: Can you please put the changes paragraph below the --- seperator so it is discarded when the patch is extracted from mail. It's not part of the changelog which goes into git. > +struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns) Can you please add kernel doc format function documentation which explains the calling conventions? > +{ > + u64 tmp, res, rem; > + > + rem = do_div(art_ns, USEC_PER_SEC); > + > + res = art_ns * tsc_khz; > + tmp = rem * tsc_khz; > + > + do_div(tmp, USEC_PER_SEC); > + res += tmp; > + > + return (struct system_counterval_t) {.cs = art_related_clocksource, > + .cycles = res}; Definitely way better than the previous one. Good job! Thanks, tglx --8323329-615922065-1520518841=:8662--