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[209.132.180.67]) by mx.google.com with ESMTP id q67si16773263pfj.146.2018.03.08.16.30.56; Thu, 08 Mar 2018 16:31:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751554AbeCIAaD (ORCPT + 99 others); Thu, 8 Mar 2018 19:30:03 -0500 Received: from mga11.intel.com ([192.55.52.93]:45340 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750922AbeCIAaC (ORCPT ); Thu, 8 Mar 2018 19:30:02 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Mar 2018 16:30:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,443,1515484800"; d="scan'208";a="23169113" Received: from orsmsx102.amr.corp.intel.com ([10.22.225.129]) by orsmga007.jf.intel.com with ESMTP; 08 Mar 2018 16:30:01 -0800 Received: from otcnsw1 (10.22.254.140) by ORSMSX102.amr.corp.intel.com (10.22.225.129) with Microsoft SMTP Server id 14.3.319.2; Thu, 8 Mar 2018 16:30:00 -0800 Message-ID: <1520558683.37755.2.camel@intel.com> Subject: Re: [PATCH v2] x86/tsc: Convert ART in nanoseconds to TSC. From: Rajvi Jingar To: Thomas Gleixner CC: , , , , , Date: Thu, 8 Mar 2018 17:24:43 -0800 In-Reply-To: References: <1520354849-32593-1-git-send-email-rajvi.jingar@intel.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.1-1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Originating-IP: [10.22.254.140] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Thomas, Thank you for your comments. On Thu, 2018-03-08 at 15:25 +0100, Thomas Gleixner wrote: > On Tue, 6 Mar 2018, Rajvi Jingar wrote: > > Device drivers use get_device_system_crosststamp() to produce > > precise > > system/device cross-timestamps. The PHC clock and ALSA interfaces, > > for example, make the cross-timestamps available to user > > applications. > > On Intel platforms, get_device_system_crosststamp() requires a TSC > > value derived from ART (Always Running Timer) to compute the > > monotonic > > raw and realtime system timestamps. > > > > Starting with Intel Goldmont platforms, the PCIe root complex > > supports > > the PTM time sync protocol. PTM requires all timestamps to be in > > units > > of nanoseconds. The Intel root complex hardware propagates system > > time – > > derived from ART - in units of nanoseconds performing the > > conversion > > as follows: > > > > ART_NS = ART * 1e9 / > > > > When user software requests a cross-timestamp, the system > > timestamps > > (generally read from device registers) must be converted to TSC by > > the driver software as follows: > > > > TSC = ART_NS * TSC_KHZ / 1e6 > > > > This is valid when CPU feature flag X86_FEATURE_TSC_KNOWN_FREQ is > > set > > indicating the tsc_khz is derived from CPUID[15H]. Drivers should > > check that this flag is set before conversion to TSC is attempted. > > Clear and coherent changelog. Well done! > > > Changes from v1: > > > > * use existing frequency hardcode for platforms where > > CPUID[15H].ECX == 0 > > (v1 added redundant hardcode just for the ART.ns conversion) > > > > * use tsc_khz for TSC conversion, also requires driver to check > > X86_FEATURE_TSC_KNOWN_FREQ (v1 used CPUID[15H].ECX value directly) > > Maintainer lazyness request: Can you please put the changes paragraph > below > the --- seperator so it is discarded when the patch is extracted from > mail. It's not part of the changelog which goes into git. > Sure. It has been changed in v3. > > +struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns) > > Can you please add kernel doc format function documentation which > explains > the calling conventions? > kernel-do format documentation is added to v3. > > +{ > > + u64 tmp, res, rem; > > + > > + rem = do_div(art_ns, USEC_PER_SEC); > > + > > + res = art_ns * tsc_khz; > > + tmp = rem * tsc_khz; > > + > > + do_div(tmp, USEC_PER_SEC); > > + res += tmp; > > + > > + return (struct system_counterval_t) {.cs = > > art_related_clocksource, > > + .cycles = res}; > > Definitely way better than the previous one. Good job! > > Thanks, > > tglx Thank you, Rajvi