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[108.223.40.66]) by smtp.gmail.com with ESMTPSA id b124sm911645oif.28.2018.03.09.14.04.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Mar 2018 14:04:00 -0800 (PST) Date: Fri, 9 Mar 2018 14:03:59 -0800 From: Guenter Roeck To: Eddie James Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, joel@jms.id.au, wim@linux-watchdog.org, Milton Miller Subject: Re: [PATCH 1/2] watchdog: aspeed: Fix translation of reset mode to ctrl register Message-ID: <20180309220359.GA32606@roeck-us.net> References: <1520632700-25800-1-git-send-email-eajames@linux.vnet.ibm.com> <1520632700-25800-2-git-send-email-eajames@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1520632700-25800-2-git-send-email-eajames@linux.vnet.ibm.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 09, 2018 at 03:58:19PM -0600, Eddie James wrote: > From: Milton Miller > > Assert RESET_SYSTEM bit for any reset and set MODE field from reset > type. > > The watchdog control register has a RESET_SYSTEM bit that is really > closer to activate a reset, and RESET_SYSTEM_MODE field that chooses > how much to reset. > > Before this patch, a node without these optional property would do a > SOC reset, but a node with properties requesting a cpu or SOC reset > would do nothing and a node requesting a system reset would do a > SOC reset. > > Fixes: b7f0b8ad25f3 ("drivers/watchdog: ASPEED reference dev tree properties for config") > Signed-off-by: Milton Miller > Signed-off-by: Eddie James Reviewed-by: Guenter Roeck > --- > drivers/watchdog/aspeed_wdt.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c > index ca5b91e..d1987d6 100644 > --- a/drivers/watchdog/aspeed_wdt.c > +++ b/drivers/watchdog/aspeed_wdt.c > @@ -232,11 +232,14 @@ static int aspeed_wdt_probe(struct platform_device *pdev) > wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM; > } else { > if (!strcmp(reset_type, "cpu")) > - wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU; > + wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU | > + WDT_CTRL_RESET_SYSTEM; > else if (!strcmp(reset_type, "soc")) > - wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC; > + wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | > + WDT_CTRL_RESET_SYSTEM; > else if (!strcmp(reset_type, "system")) > - wdt->ctrl |= WDT_CTRL_RESET_SYSTEM; > + wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP | > + WDT_CTRL_RESET_SYSTEM; > else if (strcmp(reset_type, "none")) > return -EINVAL; > } > -- > 1.8.3.1 >