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[209.132.180.67]) by mx.google.com with ESMTP id z9-v6si4914364plo.2.2018.03.11.15.48.47; Sun, 11 Mar 2018 15:49:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=GPSrkEAl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932574AbeCKWqy (ORCPT + 99 others); Sun, 11 Mar 2018 18:46:54 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:40898 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932321AbeCKWqw (ORCPT ); Sun, 11 Mar 2018 18:46:52 -0400 Received: by mail-wr0-f193.google.com with SMTP id m4so1065296wrb.7; Sun, 11 Mar 2018 15:46:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=SuXlkzpOr25y9svTIxI4P9Omi/DYXCJ7hCEqy5ZLWyw=; b=GPSrkEAlGgdp0EwYBZm6Nxmalh0iB3NCU/gPiX7nNUAAJlIPH2YfcuGx1i4VzeHBOK Y8yZ/rUw2qVWlmrEO/3SW8KHCl0vQmP5jG9X+7onGSrSNitRFdhObOfQRYLwxMDKPTgG fuytkJc1orrqkTj8WrEZbjLtxdJi0jb7Cp73Khbl7egolVhtoKBRJrh0VwZ3AcFSN18W VtsI/gzEt6k692unTjJ1d1baMofeYo2BrXNjQZhPE45e869CjnSHVuL1NCvBMOFhojgn KTQR9LtYVRKyrTWDIhwbBxighIT61NEoZgZKjVDaA/eaPMPpdB67lzxAGpEUAr0fExLv SDvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=SuXlkzpOr25y9svTIxI4P9Omi/DYXCJ7hCEqy5ZLWyw=; b=XnOXFdvoloHxHUW2+qobh7J6iRcn2tjXFF4OdtxjRHjUQAQEwOu/pHV5PJv/q71YKo SUZe3dkZL3kn2vwzKwwBJ0CVk9oaw2q9WbsetV+RfMKvG7rRdnqPkYKXVNSCvGUmhWNL r5RezmrAx3TgSaccr1UbB/XlHTp8Q2PAL+sGceL5jG0BgnBN9B0kkicnelYX5RqFbejS rwmOK4QJlQh7r6w4QLira5Fxp7coMjXSGxtxdZVu5GDZOamAM98U/ohifLDAJ9sRC4hk ifqJ7mvTUGoDwCryayGwZvRQrrOWS+zp4WIoLt2IGaOBuTkGsNw8uvL66MWjYuQ50kxB +Tew== X-Gm-Message-State: AElRT7G+Miet9TMhulIoyp2vfIRrheSgAvQz51mDVvmKbQaTzBHJujKV nJq/aw5ETfmmYicleuIvLZwPEZN/ X-Received: by 10.223.186.206 with SMTP id w14mr4911221wrg.251.1520808410638; Sun, 11 Mar 2018 15:46:50 -0700 (PDT) Received: from ziggy.stardust ([93.176.145.166]) by smtp.gmail.com with ESMTPSA id j137sm6138117wmd.17.2018.03.11.15.46.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Mar 2018 15:46:50 -0700 (PDT) Subject: Re: [PATCH v2 1/4] dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC To: Sean Wang , robh+dt@kernel.org Cc: rjw@rjwysocki.net, khilman@baylibre.com, ulf.hansson@linaro.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <1520414224.677.2.camel@mtkswgap22> From: Matthias Brugger Message-ID: <25eceb5d-7f5e-8bac-0bfd-ad547520a9b5@gmail.com> Date: Sun, 11 Mar 2018 23:44:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1520414224.677.2.camel@mtkswgap22> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/07/2018 10:17 AM, Sean Wang wrote: > Hi, Matthias > > just a gentle ping to the four related patches > All four pushed with Ulf's reviewed-by to v4.16-next/soc Thanks a lot! > Sean > > On Wed, 2018-02-07 at 18:22 +0800, sean.wang@mediatek.com wrote: >> From: Sean Wang >> >> document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A >> SoC. Where MT7623 SoC has the same definition about power domains with >> MT2701, so it's fine to using MT2701 ones as MT7623's fallback. >> >> Signed-off-by: Sean Wang >> Reviewed-by: Rob Herring >> --- >> Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt >> index 76bf45b..d6fe16f 100644 >> --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt >> +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt >> @@ -21,6 +21,8 @@ Required properties: >> - "mediatek,mt2712-scpsys" >> - "mediatek,mt6797-scpsys" >> - "mediatek,mt7622-scpsys" >> + - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC >> + - "mediatek,mt7623a-scpsys": For MT7623A SoC >> - "mediatek,mt8173-scpsys" >> - #power-domain-cells: Must be 1 >> - reg: Address range of the SCPSYS unit >> @@ -28,10 +30,11 @@ Required properties: >> - clock, clock-names: clocks according to the common clock binding. >> These are clocks which hardware needs to be >> enabled before enabling certain power domains. >> - Required clocks for MT2701: "mm", "mfg", "ethif" >> + Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif" >> Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec" >> Required clocks for MT6797: "mm", "mfg", "vdec" >> Required clocks for MT7622: "hif_sel" >> + Required clocks for MT7622A: "ethif" >> Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt" >> >> Optional properties: > >