Received: by 10.213.65.16 with SMTP id m16csp203812imf; Mon, 12 Mar 2018 00:08:38 -0700 (PDT) X-Google-Smtp-Source: AG47ELvtIoh6lWzW5gPqHeYVVcu9xW761PBxXtLGEWBJADAo161YMXioCTmyTTpMqsU8ALBprIwz X-Received: by 10.98.18.143 with SMTP id 15mr7089858pfs.104.1520838518094; Mon, 12 Mar 2018 00:08:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1520838518; cv=none; d=google.com; s=arc-20160816; b=afz+xTABoyM0CYHB8f1Ky5igLKhMt2ZIf7Tc56EOsUhH21odvP+ouCpwX11dg0rv2I lRjJL4ZWKVdNXdvfFLRjRhxHHh5/IPukxx7cVjrnMl9rGq1szqSaUjcA/UCLq3lKX0Mp DvBv74ma659Xc2mYZGzW+du2xmcJw4PrscdyOL+k1JlOovX9IMr11EvjXzwtUhwuBuL/ 2pjFwUmPEOaRR25LETiThhK/32ReMumTO6NIuNyF4Yew7ay8E6t0nEr+iWnikrvYGpFF yL+q8vuco53vOfK57QeEBOUSHhp/ztj8Ei1SWpt5DjNpwwKi9DkevkmEewiYb8Tofia3 vH5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=08vUIgqntUDoHRK16CsqOVUs5rnqJOsHd7Fy1qi7ubA=; b=gbyiFdKR5IOv1qMgCg8Gx+DC/xizkHvAyGbiA7gQMSWtUDR3Hxebi/mUeft/4tBuRc jwDuTOoQIbZTiOyA5dA5LNEin+IANxqvdbZKQ+KHbzxFvza7eqHSlJ/X51MZdH7Ef9az aFxj3rf/JhB3o/l5QXFu6EvXSb98w72kEXwJN6lzoNfemxcRU0+8HTmBVoZg2EeII/Ja GlebAfWTd+oHWdQG+Ya5+gyqcCZXpSceleu1kro1ASxi2cwMS53mSfrpAG/BI0sWpQ+L eAQqaWyuQjywDTQXY7qW/4MZtNT/bc6TM6aGGomKhDtLy5FemOMc2xu7zJUYiGo21fvX 2E5w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w22-v6si5427191pll.350.2018.03.12.00.08.23; Mon, 12 Mar 2018 00:08:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932639AbeCLHFr (ORCPT + 99 others); Mon, 12 Mar 2018 03:05:47 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:35890 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751899AbeCLHDu (ORCPT ); Mon, 12 Mar 2018 03:03:50 -0400 X-UUID: fff9d022f5ee4508b0413662d0ec5297-20180312 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 709450026; Mon, 12 Mar 2018 15:03:45 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Mon, 12 Mar 2018 15:03:44 +0800 Received: from mtkslt210.mediatek.inc (10.21.14.14) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Mon, 12 Mar 2018 15:03:44 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Mike Turquette , Rob Herring CC: James Liao , Fan Chen , , , , , , , Weiyi Lu Subject: [PATCH v2 4/5] arm64: dts: add clock device nodes of MT2712 Date: Mon, 12 Mar 2018 15:03:41 +0800 Message-ID: <20180312070342.4335-6-weiyi.lu@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20180312070342.4335-1-weiyi.lu@mediatek.com> References: <20180312070342.4335-1-weiyi.lu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org add new clocks according to ECO design change Signed-off-by: Weiyi Lu --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index fdf66f4fe7c3..d7688bc9db1b 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -199,6 +199,34 @@ clock-output-names = "clkaud_ext_i_2"; }; + clki2si0_mck_i: oscillator@6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; + clock-output-names = "clki2si0_mck_i"; + }; + + clki2si1_mck_i: oscillator@7 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; + clock-output-names = "clki2si1_mck_i"; + }; + + clki2si2_mck_i: oscillator@8 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; + clock-output-names = "clki2si2_mck_i"; + }; + + clktdmin_mclk_i: oscillator@9 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; + clock-output-names = "clktdmin_mclk_i"; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; -- 2.12.5