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[209.132.180.67]) by mx.google.com with ESMTP id b2si5543386pfc.97.2018.03.12.02.42.17; Mon, 12 Mar 2018 02:42:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Ks+c9u/a; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752522AbeCLJkg (ORCPT + 99 others); Mon, 12 Mar 2018 05:40:36 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:52666 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752458AbeCLJkc (ORCPT ); Mon, 12 Mar 2018 05:40:32 -0400 Received: by mail-wm0-f67.google.com with SMTP id t3so15031512wmc.2; Mon, 12 Mar 2018 02:40:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=LYHpE4347z997A8yGK7TapzP+TPMROj9eAN7QzwNZs8=; b=Ks+c9u/ahY0mv2bIWYPi6hkmxyCqUz8IzujFVR84k9PQGnQisAMO9QEbuQeIbUv1/v oAfDebOYxcHoJUPKInF2bgy6moxQq0rKX8/Zmt9mR/EzsbBchFjXJLaqVHe6q7lwSQHe zzsfRZAtgzeAzEogOEMJjjAqvZfjyvFcT2rbrcisDQ6RJeQ0KB6VuofKNheHU2CMcWDt yEyro1YtYQYm2Owb/28oESwsPUWNjDQNfeIM4xc1lqY4IudV1zYWTRY3hCU7rgxRVxOO A8ZDwfNnQtFgqXi+o5sGqzN3+qsU2HacGsrvIzxxex4LpXnkEDLX/ThXk4CnqueRgJPG vOQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=LYHpE4347z997A8yGK7TapzP+TPMROj9eAN7QzwNZs8=; b=nNA+p4HM5hJipeAKZco0NYC+u7ngOEIh+FQBhmwW9Fwsv1mFVcS5bJWtzLU6QT9eVb GdtKbTLJVV9wHkd8F3DYmfRIf2WZwiB26ytVca+4jU8s9/JH/MA1c8TmNE4sukDvbAPt mXaKrzSeqglgX/2R3bGPCvDSRIV/XnSBoG9hH7pOvBFUa2gXhp+nnY2Q6Q3pVzv76Gib S7pO9jfiOAvuN22sCEpRjRgrdQcBnQoHxD/rtv4LhijzGEvMafp9TaAZBOUBGg331N/F utetTdSq04Oaa/ZYqXYC0HEC0it4/l6y7VXfk62cB8RN4ew1wjs/d8wCmMj6GMRzas7D H0cA== X-Gm-Message-State: AElRT7Hrx6+qz1Jwu4qWMxrqdW2Ni3gfFqr6Z9oGSommXl/a58qNYO0m wAhithn0T5ZI/RLWgy5zx30a+m+7 X-Received: by 10.28.126.198 with SMTP id z189mr4594665wmc.135.1520847630468; Mon, 12 Mar 2018 02:40:30 -0700 (PDT) Received: from ziggy.stardust ([47.61.192.62]) by smtp.gmail.com with ESMTPSA id 140sm5284170wmy.38.2018.03.12.02.40.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 02:40:29 -0700 (PDT) Subject: Re: [PATCH v1 05/19] arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes To: sean.wang@mediatek.com, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: From: Matthias Brugger Message-ID: Date: Mon, 12 Mar 2018 10:40:28 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/23/2018 11:16 AM, sean.wang@mediatek.com wrote: > From: Sean Wang > > add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards AFAIK hsdma controller is not upstream yet. Please resubmit when at least the binding got merged. Thanks, Matthias > > Signed-off-by: Sean Wang > --- > arch/arm/boot/dts/mt7623.dtsi | 36 ++++++++++++++++++++++++++- > arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 6 ++++- > 2 files changed, 40 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi > index 91317a1..da56c54 100644 > --- a/arch/arm/boot/dts/mt7623.dtsi > +++ b/arch/arm/boot/dts/mt7623.dtsi > @@ -1,5 +1,5 @@ > /* > - * Copyright (c) 2017 MediaTek Inc. > + * Copyright (c) 2017-2018 MediaTek Inc. > * Author: John Crispin > * Sean Wang > * > @@ -483,6 +483,18 @@ > nvmem-cell-names = "calibration-data"; > }; > > + btif: serial@1100c000 { > + compatible = "mediatek,mt7623-btif", > + "mediatek,mtk-btif"; > + reg = <0 0x1100c000 0 0x1000>; > + interrupts = ; > + clocks = <&pericfg CLK_PERI_BTIF>; > + clock-names = "main"; > + reg-shift = <2>; > + reg-io-width = <4>; > + status = "disabled"; > + }; > + > nandc: nfi@1100d000 { > compatible = "mediatek,mt7623-nfc", > "mediatek,mt2701-nfc"; > @@ -508,6 +520,18 @@ > status = "disabled"; > }; > > + nor_flash: spi@11014000 { > + compatible = "mediatek,mt7623-nor", > + "mediatek,mt8173-nor"; > + reg = <0 0x11014000 0 0x1000>; > + clocks = <&pericfg CLK_PERI_FLASH>, > + <&topckgen CLK_TOP_FLASH_SEL>; > + clock-names = "spi", "sf"; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + > spi1: spi@11016000 { > compatible = "mediatek,mt7623-spi", > "mediatek,mt2701-spi"; > @@ -861,6 +885,16 @@ > #reset-cells = <1>; > }; > > + hsdma: dma-controller@1b007000 { > + compatible = "mediatek,mt7623-hsdma"; > + reg = <0 0x1b007000 0 0x1000>; > + interrupts = ; > + clocks = <ðsys CLK_ETHSYS_HSDMA>; > + clock-names = "hsdma"; > + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; > + #dma-cells = <1>; > + }; > + > eth: ethernet@1b100000 { > compatible = "mediatek,mt7623-eth", > "mediatek,mt2701-eth", > diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > index 3efecc5..ec11e14 100644 > --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > @@ -1,5 +1,5 @@ > /* > - * Copyright 2017 Sean Wang > + * Copyright 2017-2018 Sean Wang > * > * SPDX-License-Identifier: (GPL-2.0+ OR MIT) > */ > @@ -86,6 +86,10 @@ > }; > }; > > +&btif { > + status = "okay"; > +}; > + > &cir { > pinctrl-names = "default"; > pinctrl-0 = <&cir_pins_a>; >