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[209.132.180.67]) by mx.google.com with ESMTP id u19si4754900pgv.755.2018.03.12.04.00.32; Mon, 12 Mar 2018 04:00:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751282AbeCLK7P (ORCPT + 99 others); Mon, 12 Mar 2018 06:59:15 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:47323 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750811AbeCLK7O (ORCPT ); Mon, 12 Mar 2018 06:59:14 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w2CAsRKH006579; Mon, 12 Mar 2018 11:58:36 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gm60v9753-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 12 Mar 2018 11:58:36 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E600338; Mon, 12 Mar 2018 10:58:35 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C464A2715; Mon, 12 Mar 2018 10:58:35 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Mon, 12 Mar 2018 11:58:35 +0100 Received: from localhost (10.201.23.25) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Mon, 12 Mar 2018 11:58:35 +0100 From: Fabien Dessenne To: Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Jassi Brar , "Ludovic Barre" , , , CC: Benjamin Gaignard , Loic Pallardy , Arnaud Pouliquen Subject: [PATCH v2 0/2] mailbox: introduce STMicroelectronics STM32 IPCC driver Date: Mon, 12 Mar 2018 11:58:25 +0100 Message-ID: <1520852307-26659-1-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.25] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-03-12_06:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The STMicroelectronics STM32 Inter-Processor Communication Controller (IPCC) is used for communicating data between two processors. It provides a non blocking signaling mechanism to post and retrieve communication data in an atomic way. Changes since v2: - update bindings and driver according to Rob's comments: - change compatible property to "st,stm32mp1-ipcc" - change "st,proc_id" property to "st,proc-id" - define all interrupts as mandatory Fabien Dessenne (2): dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding mailbox: add STMicroelectronics STM32 IPCC driver .../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 +++ drivers/mailbox/Kconfig | 8 + drivers/mailbox/Makefile | 2 + drivers/mailbox/stm32-ipcc.c | 403 +++++++++++++++++++++ 4 files changed, 460 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/stm32-ipcc.txt create mode 100644 drivers/mailbox/stm32-ipcc.c -- 2.7.4