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[209.132.180.67]) by mx.google.com with ESMTP id 94-v6si5932599pla.215.2018.03.12.05.45.16; Mon, 12 Mar 2018 05:45:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=nHWXBICE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932147AbeCLMoD (ORCPT + 99 others); Mon, 12 Mar 2018 08:44:03 -0400 Received: from mail-it0-f54.google.com ([209.85.214.54]:38876 "EHLO mail-it0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751336AbeCLMoB (ORCPT ); Mon, 12 Mar 2018 08:44:01 -0400 Received: by mail-it0-f54.google.com with SMTP id j7-v6so11262854ita.3 for ; Mon, 12 Mar 2018 05:44:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=d1gPB7034A+ewmr+LGlRXEyzXoumIQjyJRrRftvprl0=; b=nHWXBICEhb4TbnGzie8Tb78LHN1mCxQ/EMefbQKBvkpNjPnbUUW+7b1Cj3/umhXKsy JeSszFTNzDbwxX7Sh2p06JndA9UsI96rREvCL8UQ8fKB6jkx9XfB8Gapm1yW7ADhPbUj wSgkfeJYhkdEDch82jj1AzjLd8SOE0GNyP5mq0WjqafPcyD2mGZhplzMQPWrsEfERs9n p0qknapqKbl8/IZuciPrHRr5E27C6SDtAm8DkTMUuBqdwJmf58Oh2e6o2J2/QgHA/SVO 4u9Vi4dGfB2uhVKdlcNdTi4H+eVXwTJZmBqygMpORUQSIZlM2JWgHuXl2eFHkAeFB9wh FXNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=d1gPB7034A+ewmr+LGlRXEyzXoumIQjyJRrRftvprl0=; b=Ik/Bpj7KQCMOHzmsP8Ny5PiQKR3FoMHdptD+yqHgVYwMZTAoI5qAn0fE/BYFcfpJeq CmqnkOp/9Q2yYkahgCaxMsznhXM+yFNWJwy9H/2nNs7CJ1R0kzhzM67H63upd2dlF/Ga qs/0qGwprk3EjVvFPmybb73NptZ+KXDE03GbjnEWUH4ub82p/qdmngkIgfEjVG4KxEgz tv0W45KPbeP943px0np5afW2tl7+GUCO2rc+lWtrM8HH3DwFP9+0Epq6If4/l9VG2QhW vZGfeYGNHPcrFdoZgyROiID/eP5er7B9u7nxIxrFkEYXsF+QrJCgNoHFxgDqTjm1R9E0 zXQw== X-Gm-Message-State: AElRT7Ed3GkhCZAoQelhhMR++fmaW2Ulrg6G+Je6iSkx7QWK0th6euHS 236ZZ7rRqBs6Of4ApxucBrFAh5SeZ/QfWbi3u64= X-Received: by 10.36.112.196 with SMTP id f187mr8117012itc.122.1520858640623; Mon, 12 Mar 2018 05:44:00 -0700 (PDT) MIME-Version: 1.0 Received: by 10.79.34.71 with HTTP; Mon, 12 Mar 2018 05:43:59 -0700 (PDT) In-Reply-To: References: <20180307162430.2664523-1-arnd@arndb.de> <20180307162430.2664523-2-arnd@arndb.de> From: Arnd Bergmann Date: Mon, 12 Mar 2018 13:43:59 +0100 X-Google-Sender-Auth: 3GMbPvJl4KJoQ3UxiVvveZ15p7s Message-ID: Subject: Re: [PATCH 2/2] ARM: npcm: drop extraneous 'select' statements To: Tomer Maimon Cc: Avi Fishman , Patrick Venture , Nancy Yuen , Brendan Higgins , Linux ARM , OpenBMC Maillist , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 12, 2018 at 12:43 PM, Tomer Maimon wrote: > Before entering the long mail (sorry about it) just a technical thing > I think we should add ARM_GIC configuration, It is not implied in ARCH_MULTI_V7. Yes, you are right. > Now for the real story :-) > > The NPCM7xx is a family of BMC's that include NPCM750, NPCM730 and more > > All of the NPCM7xx BMC's have the same basic modules like Cortex-A9, > WDT, timers, etc - must included shared modules, and there are a > optional modules that can be added (for example the USB is not in > NPCM730) > so the additional optional modules give us the differences between the > NPCM7xx BMC's > > I will like to use the same method that SPEAR using > (arch/arm/mach-spear/Kconfig) > > can we reflacte the NPCM7xx as follow in the Kconfig: > > menuconfig ARCH_NPCM > bool "Nuvoton NPCM Architecture" > depends on ARCH_MULTI_V7 > select USE_OF > select PINCTRL selecting pinctrl is fine, USE_OF is implied. > if ARCH_NPCM > > config ARCH_NPCM7XX > bool "Support for NPCM7xx BMC (Poleg)" > depends on ARCH_MULTI_V7 > select CACHE_L2X0 > select PINCTRL_NPCM7XX > select NPCM7XX_TIMER > select ARCH_REQUIRE_GPIOLIB > select ARM_GIC > select ARM_ERRATA_720789 > select ARM_ERRATA_754322 > select ARM_ERRATA_794072 > select PL310_ERRATA_588369 > select PL310_ERRATA_727915 > select MFD_SYSCON > help > General support for NPCM7xx BMC (Poleg). > > Nuvoton NPCM7xx BMC based on the Cortex A9. This seems fine. > config ARCH_NPCM750_NPCM730 > bool "NPCM750 or NPCM730 BMC support with Device Tree" > select HAVE_ARM_TWD if SMP > select HAVE_ARM_SCU if SMP > select ARM_ERRATA_764369 if SMP > help > General support for NPCM750 or NPCM730 BMC (Poleg). > > Nuvoton NPCM750 or NPCM730 BMC based on the Cortex A9. > > or even better include it in ARCH_NPCM7XX and remove the ARCH_NPCM750 > and ARCH_NPCM730? Yes, I think that would be best. > Regarding another matter, defconfig file: > We would like to consult how to describe the various chips (e.g. > NPCM750, NPCM730) in the defconfig file. > One option is to include all modules (as included in NPCM750 chip, > which is a superset chip) and all the chips. > The we call it npcm7xx_defconfig (same as spear13xx_deconfig) . > In this option customers of NPCM730 will need to manually undef > non-existing modules. > > Another option is to create different defconfig files for each chip of > this NPCM7xx family, e.g. npcm750_defconfig and npcm730_defconfig. > > Which approach should be adopt ? We will appreciate your advise. We don't want one defconfig per chip. Some platform maintainers don't have any defconfig for their platforms at all, but simply rely on multi_v7_defconfig for testing, which is fine as well. If you have an extra defconfig file, make sure to always update both your own file and the multi_v7_defconfig together when you add a new driver that should be enabled. For multi_v7_defconfig, make all non-essential drivers loadable modules. Arnd