Received: by 10.213.65.68 with SMTP id h4csp41826imn; Mon, 12 Mar 2018 06:09:24 -0700 (PDT) X-Google-Smtp-Source: AG47ELuCE+6u5YFxd+6jvCLYZ3zCcItOdMruSGhtsqH/8ewFaE6pAPvGYU8E92u/ZXd25AI+NqRy X-Received: by 10.98.18.70 with SMTP id a67mr7983879pfj.213.1520860164655; Mon, 12 Mar 2018 06:09:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1520860164; cv=none; d=google.com; s=arc-20160816; b=wwwVB4gVUCREPrnsU+ZQZOikbnW56IgihItxof3S2egpqBpfsE/tGtihEfX7vfQlxD fEmyChLpawnIuoqZ/pFt1n4WSSx/PzZBJG0/Snm31xPBnC8pQz2hT6AMUuN8ScXKwA7K TOzM0D9iskcyULZHKdNSL4EPnYYYRWh2JK+XD+EUqiDXS2DGw2Di0qxnxaK0ecxTVmpk uP/+lw/UsTPK3WGCEeer0vVpX7NQC5pZfh8S3dg1J3lXOH6R4yMs1LW7oIHXF8XlERSu bF8yA3w6dbQ3zeZhp9D5fB59saVTz6XqqUu072zrWqMytsZEwzGaiPuwdALK94YjkvBK 4Wyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=vw+CADaSCBhHsncXZWat8xQAvusa5K8cvnpmdXQRamk=; b=GZhaJuMATaqLgKT4L7v4LjXDGEMZkXKONlGymDtyo1OfQsdEL62cSIlR2KCK/t342Z eXOo3SSFhSc7eDmNj2fSAPpCFAiuWZMDkBaXGFZT3LRibkr7jcQySzpzrDScRAgVx22x 4boW1PchJgki7DSJKfuMa8pqFDmb3DWbs/S56EYy/KFGW8MdR/OR1pdhKq/OmiDW1Jo3 KXZow5Pe/I9l1QD8/VKuRv+vdO8y2UNOJ8baBAhYSZc+Lr3A24FKQd8K7Prv9YH02W1F rfgGC+h/AUKISpexIvHw9zYJlgnOcRGZZM04jsMvPipp5LaYUvVZdK3D9IjCFzQ9iEwM BI+g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a8-v6si529699plz.320.2018.03.12.06.09.09; Mon, 12 Mar 2018 06:09:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751379AbeCLNHN (ORCPT + 99 others); Mon, 12 Mar 2018 09:07:13 -0400 Received: from mail.skyhub.de ([5.9.137.197]:52802 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751104AbeCLNHM (ORCPT ); Mon, 12 Mar 2018 09:07:12 -0400 X-Virus-Scanned: Nedap ESD1 at mail.skyhub.de Received: from mail.skyhub.de ([127.0.0.1]) by localhost (blast.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id dInPEyqYBCSG; Mon, 12 Mar 2018 14:07:11 +0100 (CET) Received: from pd.tnic (p200300EC2BC5BE00D8383C045719CF88.dip0.t-ipconnect.de [IPv6:2003:ec:2bc5:be00:d838:3c04:5719:cf88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 699E91EC0559; Mon, 12 Mar 2018 14:07:11 +0100 (CET) Date: Mon, 12 Mar 2018 14:06:53 +0100 From: Borislav Petkov To: "Maciej S. Szmigiero" Cc: Ingo Molnar , Thomas Gleixner , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] x86/microcode/AMD: check microcode file sanity before loading it Message-ID: <20180312130653.GC9431@pd.tnic> References: <787b0ecc-8c1a-3b5a-82e0-9840c7b7c595@maciej.szmigiero.name> <20180312095336.GB9431@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 12, 2018 at 01:56:59PM +0100, Maciej S. Szmigiero wrote: > The equivalent CPU table is allocated using vmalloc() so it is nice > when the maximum size is an integer multiple of the page size. Arbitrary. > Since the maximum entry count in current microcode files is 18 the Where did you dream up that 18? > maximum size of 256 entries (or one page) gives us plenty of headroom. Arbitrary. > Also, looking in the past, there probably won't be more than 256 AMD CPU > types in one CPU family. Wrong. The only limitation on the equivalence table size we have is the 32-bit unsigned length field at offset 8 in the equivalence table header. > This limit is an absolute upper cap of a patch size. More dreamt up crap. See verify_patch_size() for the actual patch sizes. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.