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[209.132.180.67]) by mx.google.com with ESMTP id p5si5030017pga.372.2018.03.12.07.22.09; Mon, 12 Mar 2018 07:22:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751969AbeCLOVF (ORCPT + 99 others); Mon, 12 Mar 2018 10:21:05 -0400 Received: from bmailout3.hostsharing.net ([176.9.242.62]:42659 "EHLO bmailout3.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751685AbeCLOVC (ORCPT ); Mon, 12 Mar 2018 10:21:02 -0400 Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "*.hostsharing.net", Issuer "COMODO RSA Domain Validation Secure Server CA" (not verified)) by bmailout3.hostsharing.net (Postfix) with ESMTPS id 81D5A100F00F1; Mon, 12 Mar 2018 15:20:59 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id 2F00E4113E; Mon, 12 Mar 2018 15:20:59 +0100 (CET) Date: Mon, 12 Mar 2018 15:20:59 +0100 From: Lukas Wunner To: Bjorn Helgaas Cc: Christoph Hellwig , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, "Rafael J. Wysocki" , linux-pm@vger.kernel.org, Keith Busch , Sinan Kaya , Frederick Lawler Subject: Re: [PATCH v2 08/13] PCI/portdrv: Simplify PCIe feature permission checking Message-ID: <20180312142059.GA11186@wunner.de> References: <152062141493.77693.9630397416694091342.stgit@bhelgaas-glaptop.roam.corp.google.com> <152062203293.77693.8159909590216160503.stgit@bhelgaas-glaptop.roam.corp.google.com> <20180312080402.GE10358@infradead.org> <20180312140316.GB194000@bhelgaas-glaptop.roam.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180312140316.GB194000@bhelgaas-glaptop.roam.corp.google.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 12, 2018 at 09:03:16AM -0500, Bjorn Helgaas wrote: > On Mon, Mar 12, 2018 at 01:04:02AM -0700, Christoph Hellwig wrote: > > > + * We assume we can manage these PCIe features. Some systems may > > > + * reserve these for use by the platform itself, e.g., an ACPI BIOS > > > + * may implement its own AER handling and use _OSC to prevent the > > > + * OS from interfering. > > > + */ > > > + bridge->use_aer = 1; > > > + bridge->use_hotplug = 1; > > > + bridge->use_pme = 1; > > > > If we start out with enabled maybe these should be disable_foo flags > > instead? > > I went back and forth on that. "disable_foo" is nice because the > default value is correct (zero means enabled). But then you end up > with things like: > > if (pcie_ports_native || !host->disable_hotplug) > > where the "!host->disable_hotplug" is a double negative, and I have a > really hard time reading that. native_hotplug or, if you want it reversed, platform_hotplug (or firmware_hotplug?) might improve readability. Thanks, Lukas