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Subject: Re: [PATCH v12 0/6] Address error and recovery for AER and DPC
To:     Keith Busch <keith.busch@intel.com>, poza@codeaurora.org
Cc:     Bjorn Helgaas <helgaas@kernel.org>,
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        Kate Stewart <kstewart@linuxfoundation.org>,
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        Dongdong Liu <liudongdong3@huawei.com>,
        Wei Zhang <wzhang@fb.com>, Timur Tabi <timur@codeaurora.org>,
        linux-pci-owner@vger.kernel.org
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From:   Sinan Kaya <okaya@codeaurora.org>
Message-ID: <57d0b245-aecb-1518-c8bb-df8b69a86bcc@codeaurora.org>
Date:   Mon, 12 Mar 2018 13:41:07 -0400
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I was just writing a reply to you. You acted first :)

On 3/12/2018 1:33 PM, Keith Busch wrote:
>>> After releasing a slot from DPC, the link is allowed to retrain. If
>>> there
>>> is a working device on the other side, a link up event occurs. That
>>> event is handled by the pciehp driver, and that schedules enumeration
>>> no matter what you do to the DPC driver.
>> yes, that is what i current, but this patch-set makes DPC aware of error
>> handling driver callbacks.
> I've been questioning the utility of doing that since the very first
> version of this patch set.
> 

I think we should all agree that shutting down the device drivers with active
work is not safe. There could be outstanding work that the endpoint driver
needs to take care of. 

That was the motivation for this change so that we give endpoint drivers an 
error callback when something goes wrong. 

The rest is implementation detail that we can all figure out.

-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.