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[209.132.180.67]) by mx.google.com with ESMTP id be3-v6si6274584plb.581.2018.03.12.12.26.03; Mon, 12 Mar 2018 12:26:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=KxHH9/le; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932405AbeCLTYd (ORCPT + 99 others); Mon, 12 Mar 2018 15:24:33 -0400 Received: from mail-vk0-f66.google.com ([209.85.213.66]:33722 "EHLO mail-vk0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751327AbeCLTYb (ORCPT ); Mon, 12 Mar 2018 15:24:31 -0400 Received: by mail-vk0-f66.google.com with SMTP id z130so6988497vkd.0 for ; Mon, 12 Mar 2018 12:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=JEYLwiMJ/UQ8wRM+5hYsq9EzkhD9eFtIDCTITSKboBk=; b=KxHH9/leHUV+dXBVCrM5O1m7yb6V6gpxY7yLE2buT0vGfIgBWaQ3JoRoQ+YB8mA3SG ocT/FsNDzlXQ3A7B+uk+Hkg/mKeFUv3Xxi2AtswyLn9jmkj2b8dMRJ4Tj/5LXPRn4O11 AXr+etPSAneq9AjFHx+n4cwvB9zj0MEm5DYQlV96l2pl2GK5n//00W8C4j/axpdCM46p C+O8uus7hGw8XyQVM/XCabIdcqNSBrmXJkDPK9Pz03NDOsVJqRG9m/yjn6aYDSGo/Awm 0RTt80tZqTbSClElHBrEjUhp/1bUyfW+9J9L16YfHX0ktfR73mPOHp5abcgAfuJ5+mX3 ZFyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=JEYLwiMJ/UQ8wRM+5hYsq9EzkhD9eFtIDCTITSKboBk=; b=P7tCeCu5JPNQDA7XPtm8B82558RjN6FuO+bBJ7Jqog4+k5d6yq5TV9xv55z/XkLc7H otAoZNgLfE6zr4tA+K2arH7LnRhTmSUl8Hwu1UAJ7eqizYtk8iv9kB8BO4PyvC9yzOTb QEygLl6vtVeNRGiFDfV/3lrkpcmp4gSO/3HT0e9F7Js2b+1qzs7jyv+N5tW5zEPUck7Q zYve07yG6JvxAWaaFQfId5p8TcYTkYn8LCFyiKZ4xWkOhEtP4sBdoCgzJfkAHajt1gdw SuIh5b716BltBPlUNm66hTcJPHEbdk21AcGXj6OnJoVxHl0h3tu/pFzCTneN+LUv081V 9jYw== X-Gm-Message-State: AElRT7FGiSLEK8ni7hYbTfO+VgGCXi3F5fpaBLimHWS8T0eg/3ZV8JH/ yLHKlNZrCSlbrgDDrk7tMiXs8A== X-Received: by 10.31.9.144 with SMTP id 138mr5891810vkj.83.1520882670135; Mon, 12 Mar 2018 12:24:30 -0700 (PDT) Received: from localhost ([65.153.83.185]) by smtp.gmail.com with ESMTPSA id 93sm1630804uar.13.2018.03.12.12.24.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 12:24:26 -0700 (PDT) Date: Mon, 12 Mar 2018 12:24:26 -0700 (PDT) X-Google-Original-Date: Mon, 12 Mar 2018 11:46:37 PDT (-0700) Subject: Re: Make set_handle_irq and handle_arch_irq generic, v3 In-Reply-To: CC: linux@armlinux.org.uk, catalin.marinas@arm.com, Will Deacon , jonas@southpole.se, stefan.kristiansson@saunalahti.fi, shorne@gmail.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openrisc@lists.librecores.org, linux-riscv@lists.infradead.org, linux@arm.linux.org.uk From: Palmer Dabbelt To: tglx@linutronix.de Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 09 Mar 2018 15:00:56 PST (-0800), tglx@linutronix.de wrote: > On Fri, 9 Mar 2018, Palmer Dabbelt wrote: >> On Fri, 09 Mar 2018 02:20:12 PST (-0800), tglx@linutronix.de wrote: >> > This looks sensible. We have two options for getting this merged: >> > >> > 1) I'll take the whole lot through tip/irq/core >> > >> > 2) I'll apply patch 1/N to a special branch in tip. That branch will >> > contain >> > only this commit on top of 4.16-rc4 and can be pulled by the relevant >> > architecture maintainers, so they can apply their architecture specific >> > patches. >> >> Option 1 seems like the lowest overhead, as that way we don't need to sequence >> the patches between multiple trees. If all the other arch maintianers are OK >> with it then that works for me. > > Ok, I wait for someone to yell NO until tuesday. If that doesn't happen I > pick it up. > >> The 0-day robot found a new build warning on openrisc. I was plannning >> on submitting a v4 with this fix in it >> >> diff --git a/arch/openrisc/include/asm/irq.h >> b/arch/openrisc/include/asm/irq.h >> index d9eee0a2b7b4..eb612b1865d2 100644 >> --- a/arch/openrisc/include/asm/irq.h >> +++ b/arch/openrisc/include/asm/irq.h >> @@ -24,6 +24,4 @@ >> #define NO_IRQ (-1) >> -extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); >> - >> #endif /* __ASM_OPENRISC_IRQ_H__ */ >> >> I can submit a v4, or you can just grab it from > > Just reply on the v3 openrisc patch with a v4 and I grab it from there. OK, I just did -- sorry it took a while, I had to prepare for the ELC hackathon.