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[209.132.180.67]) by mx.google.com with ESMTP id 89si6439860pfo.111.2018.03.12.13.52.14; Mon, 12 Mar 2018 13:52:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=J8p9zAa2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932587AbeCLUum (ORCPT + 99 others); Mon, 12 Mar 2018 16:50:42 -0400 Received: from mail-yw0-f193.google.com ([209.85.161.193]:44822 "EHLO mail-yw0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932302AbeCLUuj (ORCPT ); Mon, 12 Mar 2018 16:50:39 -0400 Received: by mail-yw0-f193.google.com with SMTP id x197so6385468ywg.11; Mon, 12 Mar 2018 13:50:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Fr1k3SPIO42JmzfgAj7cd80A+uSl2kSn825coQuKL0I=; b=J8p9zAa24A/IhOZCIOG/Y59djC+0lrA0b4m0njs4Eoz7rIR2qBbNN04/NKK0pFpCrZ DOerDwe5UJ47s4UR0Jbg8M53aNaFRZHte0NEML0RtvV9a4D3C4J7P2aOMCeJrGzzfzE4 OHWU9EQstpa9/KSeiUFcycXuUwyNhJm91AsB/VX5sgun5uLBdEWySN6uuX2VICctb4Ut DW5w3PyqAZUJyj7zOXEqoTOvCQu+Pd5FWxeHQ2xt7MkEGehe4Ewpp4L4nbQDWSdPYGgk RF0ddYm5ft+lUINY40WqjTQcgZwjFqG8eVkCIpo8XBjsC7iEv6nJF2pwEz5ndVfGyAuj Ktig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Fr1k3SPIO42JmzfgAj7cd80A+uSl2kSn825coQuKL0I=; b=jSdpwluikKoYMsql0vm43TAb6ATcPBtX/tb5AUD0c9xvmEo7ed5VW0YKu4g6/WHIYj nfYSpj+ciRxp3VPU9RW1mTeX1H0cHcAJdZVRNlBPUDsZnQIdDmoeplgBRV1SepgG8Ooc GF5bZ050XZwI/aK4vYBkJwf6+rMCMkFBJDzzYTKi2mi//P6M88pIVHtNIIBe6NejXhSO TqB9YxjZsVB9mz5RKwR2Pv6hjaeLvoKsDsHyfQeh3ngjEcJI5d4Q3RAbXBAuP9NWHAev 5UQcTMVp7pNrkPfATklLVfQS0ByzqlsBoeVlfvzAUcYcYImKM5bM9qGpJnmpLehKkJUg hJZQ== X-Gm-Message-State: AElRT7GQiVcA/8DKYvKM6wqhdVY6x7HfYGz3qV+fJLAvkDnGKhyu8PA/ bGmb/gdTnGmgIOEAOzFgIhQ= X-Received: by 10.129.162.87 with SMTP id z84mr243067ywg.436.1520887838628; Mon, 12 Mar 2018 13:50:38 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id z80sm3433152ywz.49.2018.03.12.13.50.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 13:50:38 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 8/8] gpio: ws16c48: Implement get_multiple callback Date: Mon, 12 Mar 2018 16:50:32 -0400 Message-Id: <1776078694b1f68535fd9d0051dcaa992413ea60.1520886945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The WinSystems WS16C48 device provides 48 lines of digital I/O accessed via six 8-bit ports. Since eight input lines are acquired on a single port input read, the WS16C48 GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the ws16c48_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index 746648244bf3..6d911f8e92c1 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -129,6 +129,44 @@ static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, + unsigned long *mask, unsigned long *bits) +{ + struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); + unsigned int i; + const unsigned int gpio_reg_size = 8; + unsigned int bit_word_offset; + unsigned int bits_mask; + const unsigned long reg_mask = GENMASK(gpio_reg_size, 0); + unsigned int in_port; + unsigned long port_state; + + /* clear bits array to a clean slate */ + for (i = 0; i < chip->ngpio; i += BITS_PER_LONG) + bits[i / BITS_PER_LONG] = 0; + + /* get bits are evaluated a gpio register size at a time */ + for (i = 0; i < chip->ngpio; i += gpio_reg_size) { + bit_word_offset = i % BITS_PER_LONG; + bits_mask = mask[BIT_WORD(i)] & (reg_mask << bit_word_offset); + if (!bits_mask) { + /* no get bits in this register so skip to next one */ + continue; + } + + /* compute input port offset */ + in_port = i / gpio_reg_size; + + /* get input bits */ + port_state = inb(ws16c48gpio->base + in_port); + + /* store acquired bits */ + bits[BIT_WORD(i)] |= port_state << bit_word_offset; + } + + return 0; +} + static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); @@ -383,6 +421,7 @@ static int ws16c48_probe(struct device *dev, unsigned int id) ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input; ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output; ws16c48gpio->chip.get = ws16c48_gpio_get; + ws16c48gpio->chip.get_multiple = ws16c48_gpio_get_multiple; ws16c48gpio->chip.set = ws16c48_gpio_set; ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple; ws16c48gpio->base = base[id]; -- 2.16.2