Received: by 10.213.65.68 with SMTP id h4csp78681imn; Mon, 12 Mar 2018 18:37:44 -0700 (PDT) X-Google-Smtp-Source: AG47ELupKzqE8PbpHCArXhVuv4kPGUWwUOSdYCfaWoP25EFCz2tWPL6CB0A8zGcPBM5MlZJiwibD X-Received: by 10.99.101.198 with SMTP id z189mr114249pgb.97.1520905064161; Mon, 12 Mar 2018 18:37:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1520905064; cv=none; d=google.com; s=arc-20160816; b=liCZNe4cg+NVI/330DWepr/jiAWkb0K5M9ukWR819Pm+E8qQ6whRX5A8BQS2iSrhj2 WHVRD7SYKX/iFK5Pgpu9nlA9OqsTsm0uILVjoj3sNNgzFSbr51pFY+C8A1bfPHDK8FiJ YeP6rNlB3F1a0FJooeT/75TOmQ5qb1GU0unv1s1g/s9GRYBZObNnHgqMwMcL/n2SPqf5 vZAN4VaPtZviGstVp9MZo8dQTBtMhNv3xR8wgnOamTDB8uk1+YkVX6gZQgQblM8/IMnm 5oFte44vczzFMRPZjIQWU2r8bq5MCHizfLp0Y/aSaNUp9MRMFjfV3vn4ouEoxPCMTPB4 jvow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:organization:from:cc :references:to:subject:arc-authentication-results; bh=KSFTWg7yKSVEa8YiJHao/JDK5f7zWRLdJb/pwVQt+aQ=; b=QFkZdOSQsCq71qP9xGHjzm7nJVzUy5hfMzXs6FCy8vzo52mlvkaPQEF+ySi8T1ZrxI 4ioBmmCu/YVjj41rVmGRy9SO1O8+6XzSvhf6oyTjvQ6F40aprscA7T0lcwMlQtzh6EX5 vCsQehML17W8I2/If/uXv2rsdWYLLi4VtK+8wWESvcIdRDB3UQxiy338lBYQADq3RGaC vx3jjlzOePB7yX9Kbzhli55ARp5hMe6eo9mR0ucfO4QWxfZlIWbqPadeSL0Own/+wUm/ RzNa8igLn3HeT/cwB4eF75G4nqqj4A3NKZ+gE4q4+luRif14CoVf3yvzOfp1YRbVBorb CxtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c10si5797009pgq.535.2018.03.12.18.37.19; Mon, 12 Mar 2018 18:37:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751617AbeCMBfz (ORCPT + 99 others); Mon, 12 Mar 2018 21:35:55 -0400 Received: from foss.arm.com ([217.140.101.70]:60488 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751526AbeCMBfv (ORCPT ); Mon, 12 Mar 2018 21:35:51 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA6601596; Mon, 12 Mar 2018 18:35:50 -0700 (PDT) Received: from [192.168.3.111] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ABFC93F487; Mon, 12 Mar 2018 18:35:48 -0700 (PDT) Subject: Re: [PATCH 1/5] arm64: dts: allwinner: a64: Add i2c0 pins To: Harald Geyer , Maxime Ripard , Chen-Yu Tsai References: <20180312161050.7647-1-harald@ccbib.org> <20180312161050.7647-2-harald@ccbib.org> Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Icenowy Zheng , info@olimex.com From: =?UTF-8?Q?Andr=c3=a9_Przywara?= Organization: ARM Ltd. Message-ID: <5b7f1a15-011f-c386-4813-f0fb8a91dfd8@arm.com> Date: Tue, 13 Mar 2018 01:35:39 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20180312161050.7647-2-harald@ccbib.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/03/18 16:10, Harald Geyer wrote: > Add the proper pin group node to reference in board files. > > Signed-off-by: Harald Geyer That looks correct to me, so: Reviewed-by: Andre Przywara But out of curiosity, what is this used for? In patch 5/5 I see it being used, but without a clue for what? Shouldn't enabling an I2C node be accompanied by some child node, presenting the device on the bus? I guess this I2C is not on some kind of "header" on that laptop? Cheers, Andre. > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 1b6dc31e7d91..64e452a758fa 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -309,6 +309,11 @@ > interrupt-controller; > #interrupt-cells = <3>; > > + i2c0_pins: i2c0_pins { > + pins = "PH0", "PH1"; > + function = "i2c0"; > + }; > + > i2c1_pins: i2c1_pins { > pins = "PH2", "PH3"; > function = "i2c1"; >