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[209.132.180.67]) by mx.google.com with ESMTP id v4-v6si7341696plo.55.2018.03.13.01.49.00; Tue, 13 Mar 2018 01:49:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752206AbeCMIrB convert rfc822-to-8bit (ORCPT + 99 others); Tue, 13 Mar 2018 04:47:01 -0400 Received: from h1.radempa.de ([176.9.142.194]:54280 "EHLO mail.cosmopool.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751729AbeCMIrA (ORCPT ); Tue, 13 Mar 2018 04:47:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.cosmopool.net (Postfix) with ESMTP id D760A9002AC; Tue, 13 Mar 2018 09:46:57 +0100 (CET) Received: from mail.cosmopool.net ([127.0.0.1]) by localhost (mail.your-server.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UZbVhLcMCrMR; Tue, 13 Mar 2018 09:46:57 +0100 (CET) Received: from stardust.g4.wien.funkfeuer.at (178.113.203.188.wireless.dyn.drei.com [178.113.203.188]) by mail.cosmopool.net (Postfix) with ESMTPSA id 25DA39001A9; Tue, 13 Mar 2018 09:46:56 +0100 (CET) Received: from lambda by stardust.g4.wien.funkfeuer.at with local (Exim 4.89) (envelope-from ) id 1evfa8-0000O7-0e; Tue, 13 Mar 2018 09:46:52 +0100 From: Harald Geyer To: =?UTF-8?Q?Andr=c3=a9_Przywara?= cc: Maxime Ripard , Chen-Yu Tsai , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Icenowy Zheng , info@olimex.com Subject: Re: [PATCH 1/5] arm64: dts: allwinner: a64: Add i2c0 pins In-reply-to: <5b7f1a15-011f-c386-4813-f0fb8a91dfd8@arm.com> References: <20180312161050.7647-1-harald@ccbib.org> <20180312161050.7647-2-harald@ccbib.org> <5b7f1a15-011f-c386-4813-f0fb8a91dfd8@arm.com> Comments: In-reply-to =?UTF-8?Q?Andr=c3=a9_Przywara?= message dated "Tue, 13 Mar 2018 01:35:39 +0000." MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-ID: <1493.1520930811.1@stardust.g4.wien.funkfeuer.at> Content-Transfer-Encoding: 8BIT Date: Tue, 13 Mar 2018 09:46:51 +0100 Message-Id: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org André Przywara writes: > On 12/03/18 16:10, Harald Geyer wrote: > > Add the proper pin group node to reference in board files. > > > > Signed-off-by: Harald Geyer > > That looks correct to me, so: > > Reviewed-by: Andre Przywara > > But out of curiosity, what is this used for? In patch 5/5 I see it being > used, but without a clue for what? Shouldn't enabling an I2C node be > accompanied by some child node, presenting the device on the bus? > I guess this I2C is not on some kind of "header" on that laptop? I enabled it because the ANX6345 eDP-bridge is on that bus. There is no linux (mainline) driver for this chip at the moment, the bootloader initializes it. However I'm using the i2c-dev driver to read (and maybe) change some register values from user space. i2cdetect sees devices at 0x38, 0x39 and 0x3d - all of which might be the ANX6345. I haven't looked into this in detail. Since you are asking: Actually the teres has a "header" with usb-otg, spi, i2c1 and some gpios, but it isn't exposed on the exterior of the case and nothing is connected to it. So I didn't bother with adding nodes for this in DT. Curious what olimex are planning to do with that. Thanks for your review, Harald > Cheers, > Andre. > > > --- > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > index 1b6dc31e7d91..64e452a758fa 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > > @@ -309,6 +309,11 @@ > > interrupt-controller; > > #interrupt-cells = <3>; > > > > + i2c0_pins: i2c0_pins { > > + pins = "PH0", "PH1"; > > + function = "i2c0"; > > + }; > > + > > i2c1_pins: i2c1_pins { > > pins = "PH2", "PH3"; > > function = "i2c1"; > > > -- If you want to support my work: see http://friends.ccbib.org/harald/supporting/ or donate via CLAM to xASPBtezLNqj4cUe8MT5nZjthRSEjrRQXN or via peercoin to P98LRdhit3gZbHDBe7ta5jtXrMJUms4p7w