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[209.132.180.67]) by mx.google.com with ESMTP id j91-v6si10038pld.202.2018.03.13.04.05.46; Tue, 13 Mar 2018 04:06:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932791AbeCMLCD (ORCPT + 99 others); Tue, 13 Mar 2018 07:02:03 -0400 Received: from foss.arm.com ([217.140.101.70]:35684 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932577AbeCMLCB (ORCPT ); Tue, 13 Mar 2018 07:02:01 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8B8F11596; Tue, 13 Mar 2018 04:02:01 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 59A7C3F487; Tue, 13 Mar 2018 04:02:00 -0700 (PDT) Date: Tue, 13 Mar 2018 11:01:54 +0000 From: Mark Rutland To: Ivan Gorinov Cc: Thomas Gleixner , Frank Rowand , Linux Kernel Mailing List , Ingo Molnar , Rob Herring Subject: Re: [PATCH v5 1/2] of: Documentation: Specify local APIC ID in "reg" Message-ID: <20180313110153.vdtgljcvsbwiixwx@lakrids.cambridge.arm.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 12, 2018 at 03:21:48PM -0700, Ivan Gorinov wrote: > Set the "reg" property to the processor's local APIC ID. > Local APIC ID is assigned by hardware and may differ from CPU number. > > Signed-off-by: Ivan Gorinov > --- > Documentation/devicetree/bindings/x86/ce4100.txt | 38 ++++++++++++++++++------ > 1 file changed, 29 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt b/Documentation/devicetree/bindings/x86/ce4100.txt > index b49ae59..5a4bd83 100644 > --- a/Documentation/devicetree/bindings/x86/ce4100.txt > +++ b/Documentation/devicetree/bindings/x86/ce4100.txt > @@ -7,17 +7,37 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 > name in their compatible property because they first appeared in this > SoC. > > -The CPU node > ------------- > - cpu@0 { > - device_type = "cpu"; > - compatible = "intel,ce4100"; > - reg = <0>; > - lapic = <&lapic0>; > +The CPU nodes > +------------- > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "intel,ce4100"; > + reg = <0x00>; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "intel,ce4100"; > + reg = <0x02>; > + }; The unit-address (the bit after the '@' in the node name) should match the reg, so this node should be named cpu@2. If there's another ID associated with each CPU, then this should be described in another property. > }; > > -The reg property describes the CPU number. The lapic property points to > -the local APIC timer. Why was the lapic phandle removed? Thanks, Mark. > +A "cpu" node describes one logical processor (hardware thread). > + > +Required properties: > + > +- device_type > + Device type, must be "cpu". > + > +- reg > + Local APIC ID, a unique number assigned to each processor by > + hardware. This ID is used to specify the destination of interrupt > + messages with "physical" destination mode, including startup IPI. > > The SoC node > ------------ > -- > 2.7.4 >