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[209.132.180.67]) by mx.google.com with ESMTP id g86si312075pfk.94.2018.03.13.08.29.29; Tue, 13 Mar 2018 08:29:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=egMlzsLM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932379AbeCMP1R (ORCPT + 99 others); Tue, 13 Mar 2018 11:27:17 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:36732 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751596AbeCMP1P (ORCPT ); Tue, 13 Mar 2018 11:27:15 -0400 Received: by mail-wr0-f193.google.com with SMTP id d10so11444543wrf.3; Tue, 13 Mar 2018 08:27:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=BBWxNM4HuVukkmbVygLyaHrOQwb9BHvdMqDskuoJgUE=; b=egMlzsLMYb3UsEQnQ9QxkufhC5B/5gLk1DlOFivDqtd79A51mGhWYRgkZOmrZX27oc ZT9miRRGZHzdST1clP+IVMcAsZlGWDe9aGxEVlolrhiAoU90FysBU7010PIZ/gy+4M// 0CLYjgR5SGaawL5VuQ0Z/wGArleSjNyANjMrZLeWBDIQ5ZkTy1nIkDRI8RAWT7HFn2/n 90RVGXER+Wyqiz8erGHzPNWnBk43ULrNYALf6rsucOYRLcKAc8WeWYoh+uKGGpywnwKU LhCMIGqMyJnmOJ30ftUTBpzP76bUHyBaysJtHj/cFmMqaO7BG3/Ie8sDKX5PykXSUn1T A4jQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=BBWxNM4HuVukkmbVygLyaHrOQwb9BHvdMqDskuoJgUE=; b=thvtfBAB39tXjhlR/3mIqFsvCXQOy7CgKaaHKOLMi2tkxmIWcxDQPBdTMdCfOJ3FaY G/hvs2NmZyBGPr4VTTN5gC7ALRdJpQ5js2IedPPzl7lwaLiCMWILFzpYb4AU6qlIqqBH mE5Cye/G7SXNVX3OKowaRtLYk147gn/i6HkMrGStoZEtkg30WLfSXJc1LtH/pr0CL1m0 W7rTDnRGAxZ7IA9k/3MLOXoeS/dEvOws9Tl14NV4VLyA+kz+cn4aoNewt81+jxixlz/5 eUXqMwCWJNdiFGvSg0gVh6Qw4mUZq6LlBnJIcrRgEZTi8OmqV2tI3LUq79N6d+Xs1mzR gwfg== X-Gm-Message-State: AElRT7EqQBPv7assARoT35ycm2dbg55nWf1uGaPoFm/C6r9xjd2WbyIu PqaiSm12cCCVyX+ZSsrGb0c= X-Received: by 10.28.50.69 with SMTP id y66mr1161802wmy.35.1520954833600; Tue, 13 Mar 2018 08:27:13 -0700 (PDT) Received: from localhost ([46.227.18.67]) by smtp.gmail.com with ESMTPSA id j198sm129663wmj.3.2018.03.13.08.27.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Mar 2018 08:27:12 -0700 (PDT) From: Richard Genoud To: Stephen Boyd , Michael Turquette Cc: Gregory CLEMENT , Ralph Sennhauser , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Genoud , stable@vger.kernel.org Subject: [PATCH v2] clk: mvebu: armada-38x: add support for missing clocks Date: Tue, 13 Mar 2018 16:27:02 +0100 Message-Id: <20180313152702.21070-1-richard.genoud@gmail.com> X-Mailer: git-send-email 2.16.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Clearfog boards can come with a CPU clocked at 1600MHz (commercial) or 1333MHz (industrial). They have also some dip-switches to select a different clock (666, 800, 1066, 1200). The funny thing is that the recovery button is on the MPP34 fq selector. So, when booting an industrial board with this button down, the frequency 666MHz is selected (and the kernel didn't boot). This patch add all the missing clocks. The only mode I didn't test is 2GHz (uboot found 4294MHz instead :/ ). Fixes: 0e85aeced4d6 ("clk: mvebu: add clock support for Armada 380/385") Cc: # 3.16.x: 9593f4f56cf5: clk: mvebu: armada-38x: add support for 1866MHz variants Cc: # 3.16.x Signed-off-by: Richard Genoud Acked-by: Gregory CLEMENT --- drivers/clk/mvebu/armada-38x.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clk/mvebu/armada-38x.c b/drivers/clk/mvebu/armada-38x.c index 394aa6f03f01..9ff4ea63932d 100644 --- a/drivers/clk/mvebu/armada-38x.c +++ b/drivers/clk/mvebu/armada-38x.c @@ -46,11 +46,11 @@ static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) } static const u32 armada_38x_cpu_frequencies[] __initconst = { - 0, 0, 0, 0, - 1066 * 1000 * 1000, 0, 0, 0, + 666 * 1000 * 1000, 0, 800 * 1000 * 1000, 0, + 1066 * 1000 * 1000, 0, 1200 * 1000 * 1000, 0, 1332 * 1000 * 1000, 0, 0, 0, 1600 * 1000 * 1000, 0, 0, 0, - 1866 * 1000 * 1000, + 1866 * 1000 * 1000, 0, 0, 2000 * 1000 * 1000, }; static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) @@ -76,11 +76,11 @@ static const struct coreclk_ratio armada_38x_coreclk_ratios[] __initconst = { }; static const int armada_38x_cpu_l2_ratios[32][2] __initconst = { - {0, 1}, {0, 1}, {0, 1}, {0, 1}, - {1, 2}, {0, 1}, {0, 1}, {0, 1}, - {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {1, 2}, {0, 1}, + {1, 2}, {0, 1}, {1, 2}, {0, 1}, {1, 2}, {0, 1}, {0, 1}, {0, 1}, {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {1, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, @@ -91,7 +91,7 @@ static const int armada_38x_cpu_ddr_ratios[32][2] __initconst = { {1, 2}, {0, 1}, {0, 1}, {0, 1}, {1, 2}, {0, 1}, {0, 1}, {0, 1}, {1, 2}, {0, 1}, {0, 1}, {0, 1}, - {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {7, 15}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1},