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[209.132.180.67]) by mx.google.com with ESMTP id a9-v6si1610209pln.89.2018.03.14.01.52.14; Wed, 14 Mar 2018 01:52:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=c9RWJaZ4; dkim=pass header.i=@codeaurora.org header.s=default header.b=Q12wn2ga; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753375AbeCNIsu (ORCPT + 99 others); Wed, 14 Mar 2018 04:48:50 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58416 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750751AbeCNIsq (ORCPT ); Wed, 14 Mar 2018 04:48:46 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1EF0F60858; Wed, 14 Mar 2018 08:48:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521017326; bh=JTd75sWy4cdy0rvDy8u7PbV05IOPC51PAUZ57AZZEfA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c9RWJaZ4So4wFYhYyvCAM4QVaG/vfDUVXKX4Vgbub68TgU6w8vPQz3QtWB2+OBfCh /tr87bqd3Mq2fq0FpIVC2FSBO7bWX9cSPd5h7JJQVusQ/0U6YLFpK0fG6D0tC8RIYj fljlFvVe3oK7qMEl/1uMdHxhvFL1MoSI6RYGd8ho= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from cpandya-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cpandya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7A9C960867; Wed, 14 Mar 2018 08:48:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521017325; bh=JTd75sWy4cdy0rvDy8u7PbV05IOPC51PAUZ57AZZEfA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q12wn2gajg8nLQDU5FLsGBu75vWagc6UWs1LJDJlEUCF6R7WWchISbPrNUcRafVdo hwcjjT/Dpfs/qkCcIgcz6NgyexME6zhBDUvV4JXDNeyStEnSj38Oupm13LsjC3HlJC cU4LfaYxjbbWTEtS/Tyx7L67YS7UqbEFP4nAqyK8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7A9C960867 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=cpandya@codeaurora.org From: Chintan Pandya To: catalin.marinas@arm.com, will.deacon@arm.com, arnd@arndb.de Cc: mark.rutland@arm.com, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, james.morse@arm.com, kristina.martsenko@arm.com, takahiro.akashi@linaro.org, gregkh@linuxfoundation.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, akpm@linux-foundation.org, toshi.kani@hpe.com, Chintan Pandya Subject: [PATCH v1 1/4] asm/tlbflush: Add flush_tlb_pgtable() for ARM64 Date: Wed, 14 Mar 2018 14:18:22 +0530 Message-Id: <1521017305-28518-2-git-send-email-cpandya@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521017305-28518-1-git-send-email-cpandya@codeaurora.org> References: <1521017305-28518-1-git-send-email-cpandya@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARM64 MMU implements invalidation of TLB for intermediate page tables for perticular VA. This may or may not be available for other arch. So, provide this API hook only for ARM64, for now. Signed-off-by: Chintan Pandya --- arch/arm64/include/asm/tlbflush.h | 5 +++++ include/asm-generic/tlb.h | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 9e82dd7..5f656f0 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -209,6 +209,11 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm, dsb(ish); } +static inline void flush_tlb_pgtable(struct mm_struct *mm, + unsigned long uaddr) +{ + __flush_tlb_pgtable(mm, uaddr); +} #endif #endif diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index faddde4..7832c0a 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -295,4 +295,10 @@ static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb, #define tlb_migrate_finish(mm) do {} while (0) +#ifndef CONFIG_ARM64 +static inline void flush_tlb_pgtable(struct mm_struct *mm, + unsigned long uaddr) +{ +} +#endif #endif /* _ASM_GENERIC__TLB_H */ -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project