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Mar 2018 11:44:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=4L5hael2yIo1rbi80SrvdDvBwBBlnvULa41JXOPVqhE=; b=JdLHEvkPn0PR8+3JW39yQrsFS3bGye/zNt59ZJk4hkRg9Bobe3nioeXsil0+kTNaQKJ8s6NwvWHVKLkN/yqHlpoWHgierpcb0StehtfRvjulX0Ufu7CRF/067TV42K9+cJssaM3wXdEuauG91lX5HE7YGzTC+TT+crlfV6teqrs= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; Received: from [10.236.18.82] (165.204.77.1) by DM5PR12MB1145.namprd12.prod.outlook.com (2603:10b6:3:73::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.588.14; Wed, 14 Mar 2018 15:44:38 +0000 Subject: Re: [PATCH 11/13] dma-direct: handle the memory encryption bit in common code To: Christoph Hellwig Cc: x86@kernel.org, Konrad Rzeszutek Wilk , David Woodhouse , Muli Ben-Yehuda , Jon Mason , Joerg Roedel , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org References: <20180305174655.9878-1-hch@lst.de> <20180305174655.9878-12-hch@lst.de> <114e27be-5814-4258-4985-af08763c8a74@amd.com> <0c9d3e4a-8407-282a-73eb-21d28047e0e3@amd.com> <20180313131005.GA6260@lst.de> From: Tom Lendacky Message-ID: <69e98163-beca-fb8a-a26b-66dfeef2f689@amd.com> Date: Wed, 14 Mar 2018 10:44:29 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <20180313131005.GA6260@lst.de> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: BN6PR18CA0020.namprd18.prod.outlook.com (2603:10b6:404:121::30) To DM5PR12MB1145.namprd12.prod.outlook.com (2603:10b6:3:73::12) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: a89d119c-582f-469b-30e4-08d589c27f19 X-Microsoft-Antispam: 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X-Microsoft-Exchange-Diagnostics: 1;DM5PR12MB1145;20:/Hr4d56yDsd+rHeSUuPdV9AY3ckgYBAmudkUNt+5DyWSh5TEdyL4IZjw0kMLn3kftooY3t9jEBk0YZzGDh5xUbwP00z/3UAeG76XhllRBudzReRuImu6dFBKYa5+Sw0fKnVTvt51ewmWnl+O0ixb4MINwC/YRCrDAAjPbZwqEyxwmu3X6ZQRui3Oyybbuh3twv+YQYXGCSVdmX1IFDWG20tc5K7bbcAmDz36h8ea7fOS+xTcYepwJGtEpaw34qAH X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Mar 2018 15:44:38.2748 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a89d119c-582f-469b-30e4-08d589c27f19 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1145 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/13/2018 08:10 AM, Christoph Hellwig wrote: > On Mon, Mar 12, 2018 at 02:48:51PM -0500, Tom Lendacky wrote: >> Ok, I found one issue that allows this to work when the IOMMU isn't >> enabled (see below). > > Thanks, folded! > >> But the bigger issue is when the IOMMU is enabled. The IOMMU code uses >> a common mapping routine to create the I/O page tables. This routine >> assumes that all memory being mapped is encrypted and therefore sets the >> encryption bit in the I/O page tables. With this patch, the call to >> dma_alloc_direct() now returns un-encrypted memory which results in an >> encryption mis-match. I think keeping dma_alloc_direct() as it was prior >> to this patch is the way to go. It allows SME DMA allocations to remain >> encrypted and avoids added complexity in the amd_iommu.c file. This >> would mean that SEV would still have special DMA operations (so that the >> alloc/free can change the memory to un-encrypted). >> >> What do you think? > > In terms of logic you are right. I still don't like keeping a just > slightly tweaked version of dma_alloc_direct around just for this, it > will be perpetually out of sync in terms of features and bug fixes. > > What do you think about this version that does the decision at runtime: > > http://git.infradead.org/users/hch/misc.git/commitdiff/b89f24dc856595dc7610d672bf077195ab0dabf4 > > The full tree is available here for testing: > > git://git.infradead.org/users/hch/misc.git dma-direct-x86 > Thanks for the pointer to the tree. I did find one bug in the allocation routine, that once fixed (see below), worked with SME for IOMMU on and off and worked with an SEV guest. I understand the comment about using sev_active() in the dma-direct code, maybe we can up with something later to address that. Thanks, Tom diff --git a/lib/dma-direct.c b/lib/dma-direct.c index 856e140..988a3d8 100644 --- a/lib/dma-direct.c +++ b/lib/dma-direct.c @@ -82,10 +82,12 @@ void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, if (!page) return NULL; - *dma_handle = __phys_to_dma(dev, page_to_phys(page)); + *dma_handle = phys_to_dma(dev, page_to_phys(page)); ret = page_address(page); - if (sev_active()) + if (sev_active()) { + *dma_handle = __phys_to_dma(dev, page_to_phys(page)); set_memory_decrypted((unsigned long)ret, 1 << page_order); + } memset(ret, 0, size); return ret; }