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[209.132.180.67]) by mx.google.com with ESMTP id q25si2231438pfh.62.2018.03.14.09.31.55; Wed, 14 Mar 2018 09:32:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751824AbeCNQac (ORCPT + 99 others); Wed, 14 Mar 2018 12:30:32 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:39526 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751452AbeCNQa3 (ORCPT ); Wed, 14 Mar 2018 12:30:29 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w2EGTLt6027178; Wed, 14 Mar 2018 17:30:05 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2gpc7yqfmk-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 14 Mar 2018 17:30:05 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5CCD431; Wed, 14 Mar 2018 16:30:05 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag4node2.st.com [10.75.127.11]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 074B327BA; Wed, 14 Mar 2018 16:30:05 +0000 (GMT) Received: from localhost (10.75.127.50) by SFHDAG4NODE2.st.com (10.75.127.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 14 Mar 2018 17:30:04 +0100 From: To: Philipp Zabel , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , CC: , , , , Loic PALLARDY , benjamin GAIGNARD , Michael Turquette , , Gabriel Fernandez Subject: [PATCH v2 0/2] Introduce STM32MP1 Reset driver Date: Wed, 14 Mar 2018 17:29:59 +0100 Message-ID: <1521045001-30788-1-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG4NODE2.st.com (10.75.127.11) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-03-14_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez v2: Don't use reset-simple driver but a custom reset driver. add dt-binding documentation. This patch-set enables the reset of STM32MP1. STM32MP1 reset IP has a register to assert by writing '1' and another register to de-assert by writing '1'. The patch 'dt-bindings: reset: add STM32MP1 resets' could be squashed with the patch: 'dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings' commit 3830681d354f Gabriel Fernandez (2): dt-bindings: reset: add STM32MP1 resets reset: stm32mp1: Enable stm32mp1 reset driver .../devicetree/bindings/reset/st,stm32mp1-rcc.txt | 6 + drivers/reset/Kconfig | 6 + drivers/reset/Makefile | 1 + drivers/reset/reset-stm32mp1.c | 122 +++++++++++++++++++++ include/dt-bindings/reset/stm32mp1-resets.h | 108 ++++++++++++++++++ 5 files changed, 243 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/st,stm32mp1-rcc.txt create mode 100644 drivers/reset/reset-stm32mp1.c create mode 100644 include/dt-bindings/reset/stm32mp1-resets.h -- 1.9.1