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[209.132.180.67]) by mx.google.com with ESMTP id h132si2590718pfe.12.2018.03.14.12.41.43; Wed, 14 Mar 2018 12:41:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=oyySNl60; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751903AbeCNTkQ (ORCPT + 99 others); Wed, 14 Mar 2018 15:40:16 -0400 Received: from mail-qk0-f195.google.com ([209.85.220.195]:33337 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750779AbeCNTkP (ORCPT ); Wed, 14 Mar 2018 15:40:15 -0400 Received: by mail-qk0-f195.google.com with SMTP id f25so4817979qkm.0 for ; Wed, 14 Mar 2018 12:40:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=tAnDt9gNM7DivoW6DOeu4kUKccdGXXA1Kk3L46UmOjA=; b=oyySNl60Ya7fs+UOXqmYhuddfo4dyV+94lGxdZ51QmXO4CByWUiMbFBQMTVfRUpF2O qiMwZp7Qaf6OGWOYdP264MeJ9yKGEtPtvWWCHN5aWe3kFhQavmUWp4ZMDUMDHvM97mZv ZRwyIyn995EO/aUVAui8YFLNqFfj5lV5CFaF9ccBAkLyJFLZq7JmRht9EEUhwHr4Oayj 36AJrLfLBZL14UbiELSrFX1dlQIDvgfLAEXJC8RDrzQl51PnrzI/exVKKX2pHgkXGwcR 4nAr07JvV7zeFi5BLfmp1cM2oPYwFGGK0d/IQnOvOvufW4ElCMBwikUjlgwp96tR0nB6 tgnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=tAnDt9gNM7DivoW6DOeu4kUKccdGXXA1Kk3L46UmOjA=; b=DTYqaLdbFrxSPGtuEKeCpiyis0nhCcgDD/u3GVxRJkzj/m1TYa5vUG4BK5SYGYtl/W Od04tRbznBJWuysyqMAnmxAqY+wC7Bp7Y6JcbwK8/ElwG1xgLcuWKj9Lpwie8KC7dd8J df81koiONnjNQ++e9udMlaXWjDocMQ7J1VyAk8xkR2lK16E/p06ElZNF08Icwy1rLTPf zNVmrrpQW6wjFs/FE+kDzdpmFzoP4o+/mfatn0MQvsptpXCBxQp+89x2hTqmr+tu9+dY SSkJbJTrePpXGCoZcoWoDFHAUrgSJNkaVfTN/joZRlG7SYuHFtVkNQytAE6wHvVxfYUT evZA== X-Gm-Message-State: AElRT7EjoURenwRX19JrjRlZjTmLFSeLefzdPzoJJd5QyJOoNN0aru2d 6aF14Xlk8d0jQAVhWcp6JaaBpIlA X-Received: by 10.55.200.151 with SMTP id t23mr8919532qkl.146.1521056414195; Wed, 14 Mar 2018 12:40:14 -0700 (PDT) Received: from [10.69.41.93] ([192.19.223.250]) by smtp.googlemail.com with ESMTPSA id n187sm2025722qke.48.2018.03.14.12.40.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Mar 2018 12:40:12 -0700 (PDT) Subject: Re: [PATCH 0/4] ARM: brcmstb: Add support for the V7 memory map To: Florian Fainelli , linux-arm-kernel@lists.infradead.org, Russell King Cc: Brian Norris , Gregory Fong , "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" , Doug Berger , Vladimir Murzin , Philippe Ombredanne , Greg Kroah-Hartman , open list References: <20180223210923.544-1-f.fainelli@gmail.com> From: Florian Fainelli Message-ID: Date: Wed, 14 Mar 2018 12:40:10 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <20180223210923.544-1-f.fainelli@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/23/2018 01:09 PM, Florian Fainelli wrote: > Hi all, > > This patch series updates the brcmstb.S DEBUG_LL routines to dynamically detect > one of the latest STB chip: BCM7278. This chip has a different memory map which > requires use to lookup the main ID register to know whether which register > physical offset we must use. > > As a consequence of doing that, we do a number of things: > > - allow the inclusion of cputype.h in assembly files to reduce the duplication > of constants > - define the Brahma-B53 and Brahma-B15 main ID register values, which was long > overdue > - finaly update brcmstb.S to detect 7278 and offset the base register address > accordingly > > Note that Doug had a slightly different approach in our downstream tree where he > actually added the same MIDR_* constants similar to what ARM64 has, I took that > part away in order to minimize the delta, but I can easily submit that patch > if this is the desired direction moving forward. Russell, I would be more comfortable taking those changes through our Broadcom ARM SoC pull requests, since the majority of the changes are in brcmstb.S, can I get your acknowledgment for the first 3 patches? Thank you! > > Thank you! > > Doug Berger (3): > ARM: Allow this header to be included by assembly files > ARM: add Broadcom Brahma-B53 main ID definition > ARM: brcmstb: Add support for the V7 memory map > > Florian Fainelli (1): > ARM: add Broadcom Brahma-B15 main ID definition > > arch/arm/include/asm/cputype.h | 15 ++++++++++++--- > arch/arm/include/debug/brcmstb.S | 21 ++++++++++++++++++++- > 2 files changed, 32 insertions(+), 4 deletions(-) > -- Florian