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From:   Alexander Duyck <alexander.duyck@gmail.com>
Date:   Wed, 14 Mar 2018 18:47:23 -0700
Message-ID: <CAKgT0Ue=hYC6qRO9Z193JKKvkQtmyaXm3rcy3naxFqTRW0J_8g@mail.gmail.com>
Subject: Re: [PATCH 2/7] ixgbe: eliminate duplicate barriers on weakly-ordered archs
To:     Sinan Kaya <okaya@codeaurora.org>
Cc:     Netdev <netdev@vger.kernel.org>, Timur Tabi <timur@codeaurora.org>,
        sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
        intel-wired-lan <intel-wired-lan@lists.osuosl.org>,
        LKML <linux-kernel@vger.kernel.org>
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On Tue, Mar 13, 2018 at 8:20 PM, Sinan Kaya <okaya@codeaurora.org> wrote:
> Code includes wmb() followed by writel() in multiple places. writel()
> already has a barrier on some architectures like arm64.
>
> This ends up CPU observing two barriers back to back before executing the
> register write.
>
> Since code already has an explicit barrier call, changing writel() to
> writel_relaxed().
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>

In this patch you missed the writel at the end of ixgbe_tx_map.