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[209.132.180.67]) by mx.google.com with ESMTP id m25si2766873pge.338.2018.03.14.19.07.13; Wed, 14 Mar 2018 19:07:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Fzl/0jpe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751666AbeCOCEv (ORCPT + 99 others); Wed, 14 Mar 2018 22:04:51 -0400 Received: from mail-ot0-f194.google.com ([74.125.82.194]:38748 "EHLO mail-ot0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751571AbeCOCEs (ORCPT ); Wed, 14 Mar 2018 22:04:48 -0400 Received: by mail-ot0-f194.google.com with SMTP id 95-v6so5359110ote.5 for ; Wed, 14 Mar 2018 19:04:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=nrvySmGlEuEePiWNYfaGy0dGhn1+zLZNjC4iKX59MTk=; b=Fzl/0jpeOXH3izENuA9ydbZNRNposX0kuqaRyAgMHmWbMwAwp87eviemiijFJC8N2b IQw0EM3ZMfGEl6eybkwurirnro9WhxA80STW1kgDlC62N6EITA/pN/4ACUXWVmGpoo/G ciWG0cHoH8gJrjjz2x9jqCJ6hHOnm8/EADgeo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=nrvySmGlEuEePiWNYfaGy0dGhn1+zLZNjC4iKX59MTk=; b=uIPcVrdTMQcevF0ychlN5qK0cFIVvcsvhIaNSslrT200JttP2Ac/IpOtYJThwY0teB TA2O6rDRWNdYNO/d0hE3f742z5p6SUm57f9zhRy8+R7j+0axLs3AxPpiaMEB3yXdIOpy Bhq8gNmx4trFIOy0OuBReCiCIOi8P3fntqKvkikOZSGa41gPE8+jq63LxKQfq8f+ct4Z 6EP9bNJRPPhd0RTJuskem+/GNCOQ1MLw8g1k40bSUgr4K4BEO9zmBDzbyiO+G7dJgIIC IrWSlQxPUhQ+cXRUtUP5uYKrUWDoHwrsR9G0Ndq5iDm0H9hg1rfk7Pjs5j6/rFMAX3Th Hayw== X-Gm-Message-State: AElRT7E+TwSEP3/6dLOdqzGIWuDC86IOqvawrS5jDf4/dCDa2G4JnD8R UZltF1Z+VJlAxrqHPLJO8NEiJQ== X-Received: by 10.157.90.157 with SMTP id w29mr4176404oth.13.1521079487825; Wed, 14 Mar 2018 19:04:47 -0700 (PDT) Received: from djkurtz2.bld.corp.google.com ([2620:15c:183:0:1cfd:61a5:7215:5f9c]) by smtp.gmail.com with ESMTPSA id j142sm1642773oih.7.2018.03.14.19.04.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Mar 2018 19:04:47 -0700 (PDT) From: Daniel Kurtz To: Greg Kroah-Hartman Cc: adurbin@chromium.org, linux-kernel@vger.kernel.org, Daniel Kurtz Subject: [PATCH v3 0/3] Add earlycon support for AMD Carrizo / Stoneyridge Date: Wed, 14 Mar 2018 20:04:42 -0600 Message-Id: <20180315020445.150604-1-djkurtz@chromium.org> X-Mailer: git-send-email 2.16.2.804.g6dcf76e118-goog Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz input clock. Currently, there is no way to tell earlycon to use a specific uart input clock when configuring a baud rate. Patch 1 adds an earlycon ->setup() callback to set up this clock. The setup is triggered on the commandline by specifying "earlycon=amdcz,...". Patch 2 adds an ACPI SPCR quirk to automatically trigger this hook when the ACPI SPCR table OEMID field is "AMDCZ ". Patch 3 adds an additional fix which allows botht the ACPI SPCR quirk and amdcz ->setup() to tell 8250_core to skip initialization of old serial ports that do not exist on these SoCs. Daniel Kurtz (3): serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge ACPI: SPCR: Add support for AMD CT/SZ serial: core: Allow skipping old serial port initialization drivers/acpi/spcr.c | 26 ++++++++++++++++++++++++++ drivers/tty/serial/8250/8250_core.c | 6 ++++++ drivers/tty/serial/8250/8250_early.c | 16 ++++++++++++++++ include/linux/serial_8250.h | 2 ++ 4 files changed, 50 insertions(+) -- 2.16.2.804.g6dcf76e118-goog