Received: by 10.213.65.68 with SMTP id h4csp1611227imn; Thu, 15 Mar 2018 04:57:26 -0700 (PDT) X-Google-Smtp-Source: AG47ELsAZi0bSQehnuYORl5Ol0yoeKq62FunHWEflUMeV6+MlNuxYzOvdofmUmipXYpzUrRa5nrk X-Received: by 10.99.185.7 with SMTP id z7mr6700599pge.123.1521115045945; Thu, 15 Mar 2018 04:57:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521115045; cv=none; d=google.com; s=arc-20160816; b=TZ+Q3uQhiFlYQNRyCv2K5DwhHRrHVlrJ+3OUZ3ndinaJRJQ5KhS5jwsGnyH/GtZcqB Sr9AFlSWXb0aYsKOuv+vuLKX6vR1BmGqDLEDyPiNnKPaMKqnRlKDBB0J4ZHSoXMM28y5 AOvSrtd77ZVEX2dHiY9Re/zC7G+vsVnnIUJak5WoAPIqQG6N5d4fXZuo8fC4WR0XM1ET LqfviVCdO+5srb9KZ1EX/UN9G8ybXfpvGhvZngyvG+D/D+lIBzZbpEj7YgKkadrvpEyL jt3+bNgFY8JkLWa9hNTMn8FQOztHoAk19940CwSbjTmREP727p14WPgLg/u+3OZhSfoI Qbjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=q3q9PRMA5EPH9HvpB896Y2fd/Dwgod9dm0kyC99EDb4=; b=y4FV7lGQQxBje32pzmqnRyYeJrX92yJLGglX8rzAfl0vjCxSSdoV7d4E18iZJU8Hen HuIEtpC2xgKY1DKFfnb/PeUxprAxXLL245ckWy4D0t/BOdtoAyfJsRos5vyc+8xyrUG9 J5Ylxu9zliKJbDkDxk/Shh4cD1Q0154hpwmycmHjSOolYBwSJlXmZ1XvAFtkhsoTrZ0r 1R81QY94dkHDpjxXGjx52mCHQuVHXAumSIQR9fCkDdI50Edp9UqWuh64A74KUVwOM/ZI 0KAW69pu6dYpWYx1Ygzf5oU08E5ZA39sXosm81v5YaRbvDrUsCU0Ad/O0zloP3JoxZ4C VjPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=GsbQFQ+p; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o7si3377483pgq.133.2018.03.15.04.57.08; Thu, 15 Mar 2018 04:57:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=GsbQFQ+p; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751975AbeCOL4D (ORCPT + 99 others); Thu, 15 Mar 2018 07:56:03 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:35391 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751353AbeCOLzv (ORCPT ); Thu, 15 Mar 2018 07:55:51 -0400 Received: by mail-wr0-f195.google.com with SMTP id n12so8015285wra.2 for ; Thu, 15 Mar 2018 04:55:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=q3q9PRMA5EPH9HvpB896Y2fd/Dwgod9dm0kyC99EDb4=; b=GsbQFQ+pDYTPkRR922Q4QygK0tlcZJr19j2E9Uo9dHlBg3Strx7I8qipNm43u+Re6o 7HMeyYv3tvSLGAI5FcL6PCVCjC/2/IsVfMmXmwZITSEE8IxqCCTFbeqzrVm1Svm1pR79 AO04X3EVm3Ktjt3vrU8SGAcNepfIlizKfOsV3I7mSegctBKbm+qdZXQDVFmW2UBPw+yA gNbh7D6osjlYHveURvkafk4T8btLvWP/SsI/cMqEVQxaVBFnEmNHdD9EqGFWgfst18m3 LYhgX1ZG4LnYXwaXLOK5CUwhO38itHKnIJszdYrOfaEO8DDEQeELh6bsfgqlyilMEfIt chtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=q3q9PRMA5EPH9HvpB896Y2fd/Dwgod9dm0kyC99EDb4=; b=bAs5M+lDBXzKpLS0d8zE+abZz7ImA5AGVmjdm2+VPCSlELGAZKg17r0HnQcMsphOn0 zp0XtoQ5V360Br/jbreu1SPuchA/XNPz+vP6zoV90fUoGNxUzRl+lisCMN0w7SiFpbQJ cIVde6lEw8+Mp88EDnP4E2XvAQEiZaeod3LIjMC563blI5nV3uN22WNQMz0Isp7P3m1O V/nbKQZwUOylysOoZYGK1/7It5AvYdKz2q1sq881l7Jp39JTdIHg0CxIWF01jZ4WbWbf 4Ja5ZfKpJHA7f84up9lGBIOkPmhwQ7+goPeJtItP+yE+Xd4dnuAhv/3VB6Iy7aFowJvh Ffgg== X-Gm-Message-State: AElRT7E7z7Xp8HbKdM2t7PneALrXA+N722x9ayVhY0N180CkBNn1Jeay WVpfE7j1+79SPQGf4urbtG1j3g== X-Received: by 10.223.146.133 with SMTP id 5mr7155821wrn.109.1521114950214; Thu, 15 Mar 2018 04:55:50 -0700 (PDT) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id e18sm4483318wmc.21.2018.03.15.04.55.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 15 Mar 2018 04:55:49 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione , Neil Armstrong Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/4] dt-bindings: clock: meson: update documentation with hhi syscon Date: Thu, 15 Mar 2018 12:55:42 +0100 Message-Id: <20180315115545.1884-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180315115545.1884-1-jbrunet@baylibre.com> References: <20180315115545.1884-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The HHI register region hosts more than just clocks and needs to accessed drivers other than the clock controller, such as the display driver. This register region should be managed by syscon. It is already the case on gxbb/gxl and it soon will be on axg. The clock controllers must use this system controller instead of directly mapping the registers. This changes the bindings of gxbb and axg's clock controllers. This is due to an initial 'incomplete' knowledge of these SoCs, which is why the meson bindings are unstable ATM. Signed-off-by: Jerome Brunet --- .../devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt index e2b377ed6f91..e950599566a9 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt @@ -10,9 +10,6 @@ Required Properties: "amlogic,gxl-clkc" for GXL and GXM SoC, "amlogic,axg-clkc" for AXG SoC. -- reg: physical base address of the clock controller and length of memory - mapped region. - - #clock-cells: should be 1. Each clock is assigned an identifier and client nodes can use this identifier @@ -20,13 +17,22 @@ to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be used in device tree sources. +Parent node should have the following properties : +- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or + "amlogic,meson-axg-hhi-sysctrl" +- reg: base address and size of the HHI system control register space. + Example: Clock controller node: - clkc: clock-controller@c883c000 { +sysctrl: system-controller@0 { + compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd"; + reg = <0 0 0 0x400>; + + clkc: clock-controller { #clock-cells = <1>; compatible = "amlogic,gxbb-clkc"; - reg = <0x0 0xc883c000 0x0 0x3db>; }; +}; Example: UART controller node that consumes the clock generated by the clock controller: -- 2.14.3