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[209.132.180.67]) by mx.google.com with ESMTP id g17-v6si3999952plo.655.2018.03.15.08.54.28; Thu, 15 Mar 2018 08:54:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=gs5q09rn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932675AbeCOPxO (ORCPT + 99 others); Thu, 15 Mar 2018 11:53:14 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:34003 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932404AbeCOPxM (ORCPT ); Thu, 15 Mar 2018 11:53:12 -0400 Received: by mail-yw0-f194.google.com with SMTP id x17so4924236ywj.1; Thu, 15 Mar 2018 08:53:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IJYRNcOUEvbElAD43QFb+n+SUBEKYb1yA+zEXAuUoxI=; b=gs5q09rnJuh+uqqeueO6WSTBOCrdUlDPWIWP2fvESfyYLWVzQ27fBjJReoZ14JcSf0 iG6lTINgZCGdnWf+0qiFucugjRtPn1dSlz+HyCAIlbBLmPXOHdzGcONLW7ULVwCewqfS OQaSFLKQ5eG8cTWIF8IEXCXeixQ2eTcx7ax4iZeCf56tLEG2wsqEgjDZELi5WChSYgBw Doa5EAd9FOO6cu/fwDWjfFPS6Aztv+FRul/ETiqNW4/Mm2W0QvL9yallH/9bq74UpU/8 cnauzXtMbiFQXs08gofedCi4Jg4Xhp5RNnUjTsROjxDxnw1V+MIp0c742dJUxvH6NeCk yNow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IJYRNcOUEvbElAD43QFb+n+SUBEKYb1yA+zEXAuUoxI=; b=ewejzgbdn1YqzmfrGnMeFQP1Iy+m4yBapFOgmBfKDPHWQIDlrvZpQ90HmgJqZrZz5c JMsL+NcXvE5gOHF7sdzq1URohAXDRvYNB8W/jjZcw7yAnRieCVlZW5CA9LjgRST/78aa a0oRIAAI7AuqlgbqjGIQPWjWZPux5k8k80GxxbilD4CMQ/RUhZbJ4gKLCGdD4Wx+vAaq ne4rX0MKCTfgsz4VhsrKX/wNpSIeqVse6gmntO5b+rEdkCCK1EAreKfkvGZJwdP6uPeu Vz00t4uwTuTPwLU+HgvrdzwWaOlkOtxOW6CoyT/BLwZr711EHH1M3QtVYXpoxQ6Vq/wO V8oQ== X-Gm-Message-State: AElRT7FC2V2mxe5r823Re3EhxiUo61lhV9jMG9sV2mFj6gBBxha9Xsou v0O8B3/C5d9U+lcMTNvbQDI= X-Received: by 2002:a25:6dc2:: with SMTP id i185-v6mr6157675ybc.81.1521129191481; Thu, 15 Mar 2018 08:53:11 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id x133sm1933461ywc.27.2018.03.15.08.53.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Mar 2018 08:53:10 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: andy.shevchenko@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 5/8] gpio: 104-dio-48e: Implement get_multiple callback Date: Thu, 15 Mar 2018 11:53:05 -0400 Message-Id: X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ACCES I/O 104-DIO-48E series of devices contain two Programmable Peripheral Interface (PPI) chips of type 82C55, which each feature three 8-bit ports of I/O. Since eight input lines are acquired on a single port input read, the 104-DIO-48E GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the dio48e_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 46 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index bab3b94c5cbc..537b436c6e7f 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -182,6 +182,51 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); + size_t i; + const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + const unsigned int gpio_reg_size = 8; + unsigned int bits_offset; + size_t word_index; + unsigned int word_offset; + unsigned long mask_word; + const unsigned long port_mask = GENMASK(gpio_reg_size, 0); + unsigned long port_state; + + /* clear bits array to a clean slate */ + bitmap_zero(bits, chip->ngpio); + + /* get bits are evaluated a gpio port register at a time */ + for (i = 0; i < ARRAY_SIZE(ports); i++) { + /* gpio offset in bits array */ + bits_offset = i * gpio_reg_size; + + /* word index for bits array */ + word_index = BIT_WORD(bits_offset); + + /* gpio offset within current word of bits array */ + word_offset = bits_offset % BITS_PER_LONG; + + /* mask of get bits for current gpio within current word */ + word_mask = mask[word_index] & (port_mask << word_offset); + if (!word_mask) { + /* no get bits in this port so skip to next one */ + continue; + } + + /* read bits from current gpio port */ + port_state = inb(dio48egpio->base + ports[i]); + + /* store acquired bits at respective bits array offset */ + bits[word_index] |= port_state << word_offset; + } + + return 0; +} + static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); @@ -384,6 +429,7 @@ static int dio48e_probe(struct device *dev, unsigned int id) dio48egpio->chip.direction_input = dio48e_gpio_direction_input; dio48egpio->chip.direction_output = dio48e_gpio_direction_output; dio48egpio->chip.get = dio48e_gpio_get; + dio48egpio->chip.get_multiple = dio48e_gpio_get_multiple; dio48egpio->chip.set = dio48e_gpio_set; dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple; dio48egpio->base = base[id]; -- 2.16.2