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Ly" , Mahesh Salgaonkar , "Naveen N. Rao" , Daniel Axtens , Nicholas Piggin , Al Viro , David Gibson , Greg Kroah-Hartman , Linux Kernel Mailing List , Sergey Senozhatsky , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Masami Hiramatsu , Andrew Donnellan , Philippe Ombredanne , Joe Perches , "Oliver O'Halloran" , Andrew Morton , "Tobin C. Harding" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 15, 2018 at 12:15 PM, Michal Suchanek wrote: > This is based on x86 patch doing the same. > > Signed-off-by: Michal Suchanek > --- > --- a/arch/powerpc/include/asm/uaccess.h > +++ b/arch/powerpc/include/asm/uaccess.h > @@ -258,8 +259,10 @@ do { \ > long __gu_err = -EFAULT; \ > unsigned long __gu_val = 0; \ > const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ > + int can_access = access_ok(VERIFY_READ, __gu_addr, (size)); \ > might_fault(); \ > - if (access_ok(VERIFY_READ, __gu_addr, (size))) \ > + barrier_nospec(); \ > + if (can_access) \ > __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ > (x) = (__force __typeof__(*(ptr)))__gu_val; \ > __gu_err; \ Is the above really correct? The barrier is *before* the conditional branch that might be mis-predicted. I don't know how the ppc barrier works, but that sounds completely bogus. Linus