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[209.132.180.67]) by mx.google.com with ESMTP id q24-v6si5160011pls.600.2018.03.15.19.56.11; Thu, 15 Mar 2018 19:56:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=JG9DJ76L; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753101AbeCPCyM (ORCPT + 99 others); Thu, 15 Mar 2018 22:54:12 -0400 Received: from vern.gendns.com ([206.190.152.46]:55539 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751877AbeCPCyE (ORCPT ); Thu, 15 Mar 2018 22:54:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=+6uUD9iYuxi9JdB3VWmCGH5e0/Icm6YbVrYwYZuGIac=; b=JG9DJ76LbPMGdRZlCx3/ENvLj fFj8oLWo597NRN2HrA6UuXWHYl+YsCXNQytuJNGKM2sSYRGvy8pjKXqBa4HtGdKNZkIxAdXN1maf6 C9VRI/rbal7emSpYgciCPQVR275bFQ3qisImHdKDApSNtZPGBjkxa+oWB6F23L78e5kioD6NeXlOA JO67O5f+BxlijDgDeveoEdQMIfkYHoluAYXUr8eNdhlOB8sc4toAHoLrXTQO+oJUSTNJVG4geZVx2 ABC/IppcwACSBJwvujrSdCv2/9ujPB7wT07KLgEGIAt6l7sH6JwCV/bk6wNxM5RHzD04wFqMKkBoR isUW90aMg==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:44986 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1ewfTP-002UlD-Ad; Thu, 15 Mar 2018 22:52:03 -0400 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v8 24/42] ARM: davinci: dm365: add new clock init using common clock framework Date: Thu, 15 Mar 2018 21:52:40 -0500 Message-Id: <1521168778-27236-25-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521168778-27236-1-git-send-email-david@lechnology.com> References: <1521168778-27236-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds the new board-specific clock init in mach-davinci/dm365.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner --- v8 changes: - none v7 changes: - add clock platform device declarations - register platform devices instead of registering clocks directly - add davinci prefix to commit description v6 changes: - add blank lines between function calls arch/arm/mach-davinci/board-dm365-evm.c | 2 + arch/arm/mach-davinci/davinci.h | 1 + arch/arm/mach-davinci/dm365.c | 88 ++++++++++++++++++++++++++++----- 3 files changed, 79 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 0ac085b..36b69a1 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -741,6 +741,8 @@ static __init void dm365_evm_init(void) { int ret; + dm365_register_clocks(); + ret = dm365_gpio_register(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 6b6abf0a..c865226 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -94,6 +94,7 @@ int dm355_gpio_register(void); /* DM365 function declarations */ void dm365_init(void); void dm365_init_time(void); +void dm365_register_clocks(void); void dm365_init_asp(void); void dm365_init_vc(void); void dm365_init_ks(struct davinci_ks_platform_data *pdata); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 871372a..93067e1 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -12,32 +12,35 @@ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include -#include -#include -#include +#include #include #include -#include +#include #include #include #include #include +#include +#include +#include #include +#include #include -#include "psc.h" -#include #include -#include +#include #include -#include +#include +#include "asp.h" #include "davinci.h" -#include "clock.h" #include "mux.h" -#include "asp.h" + +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ #define DM365_RTC_BASE 0x01c69000 @@ -54,6 +57,7 @@ #define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 #define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 +#ifndef CONFIG_COMMON_CLK static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -485,7 +489,7 @@ static struct clk_lookup dm365_clks[] = { CLK(NULL, "mjcp", &mjcp_clk), CLK(NULL, NULL, NULL), }; - +#endif /*----------------------------------------------------------------------*/ #define INTMUX 0x18 @@ -1171,8 +1175,68 @@ void __init dm365_init(void) void __init dm365_init_time(void) { +#ifdef CONFIG_COMMON_CLK + struct clk *clk; + + clk = clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ); + + davinci_timer_init(clk); +#else davinci_clk_init(dm365_clks); davinci_timer_init(&timer0_clk); +#endif +} + +static struct resource dm365_pll1_resources[] = { + { + .start = DAVINCI_PLL1_BASE, + .end = DAVINCI_PLL1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm365_pll1_device = { + .name = "dm365-pll1", + .id = -1, + .resource = dm365_pll1_resources, + .num_resources = ARRAY_SIZE(dm365_pll1_resources), +}; + +static struct resource dm365_pll2_resources[] = { + { + .start = DAVINCI_PLL2_BASE, + .end = DAVINCI_PLL2_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm365_pll2_device = { + .name = "dm365-pll2", + .id = -1, + .resource = dm365_pll2_resources, + .num_resources = ARRAY_SIZE(dm365_pll2_resources), +}; + +static struct resource dm365_psc_resources[] = { + { + .start = DAVINCI_PWR_SLEEP_CNTRL_BASE, + .end = DAVINCI_PWR_SLEEP_CNTRL_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device dm365_psc_device = { + .name = "dm365-psc", + .id = -1, + .resource = dm365_psc_resources, + .num_resources = ARRAY_SIZE(dm365_psc_resources), +}; + +void __init dm365_register_clocks(void) +{ + platform_device_register(&dm365_pll1_device); + platform_device_register(&dm365_pll2_device); + platform_device_register(&dm365_psc_device); } static struct resource dm365_vpss_resources[] = { -- 2.7.4