Received: by 10.213.65.68 with SMTP id h4csp127491imn; Thu, 15 Mar 2018 20:01:23 -0700 (PDT) X-Google-Smtp-Source: AG47ELuvpOyicveI+yFq1Y8zcYLfVYQyDrFIq4rtigwcUZDYpGDf/jzNrT1c3QgC7fJJ54K1HQxI X-Received: by 10.98.133.193 with SMTP id m62mr199636pfk.74.1521169283411; Thu, 15 Mar 2018 20:01:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521169283; cv=none; d=google.com; s=arc-20160816; b=V73IUeOBZUGEBMWCm75y1RfBFOtKvYTbpZUM5N3W5JzXrMNiAhaf8sNyZtH41bYdqR r4tdSxQRJCfZlBMDeAN+Fiq1d5vnF89nnOAkO+wPk/50PwmpEnVkYKWgCLBgZVZ2ofGA m/YdjI6ixCqZeOghZMrjM0BoCtzmWax2lRjZ2zRCjWG11K6kzH8tgWO+jf9Ji3psvZK7 rwMMnlUzsPyII7D2aT0jifA0YkJgtZlWADBm8dAy6u+pVAPRB1ECXS+8DfWZe/bRgl86 9WNpruR1MhJ76LjcnzJjTU/wQJae5y1g8kXH63Cvp9RzwCyHA7pkoQWqjotoO5fYBTij UeuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=IR+kOcsU6pp5gzPaYsamzvi0MfWkxdTfP2aGThCQ+BQ=; b=uCmbQiW6waaemh/64jc05bQZYiIID7QOdnXD7t7qWVBoNSMiTFJOSVPwHKkS+CggB+ xekrP/kKnqKdJSKUsi94TTxEJCWgVSkvreffJUQcmL2GhnmRb4WeeJH3IgDiU/ra3LAt HRzmZU9Hrto4XhJhhkkCMgGxjGifD9Nlhzt76hZvRp7ruQb032MAcwNEA4C81KXUofId HCg3Iq/NnBWvHTVHN5neRm3nz3ntZBodvTwM/5iAyLjWjYkOdTtQQNee3NQiZ188Tgw/ tBznJwkgD73IK4DXG3eeKjQbn1rnN/8Bdv1hPZ/2anXP2lslX97M6W7NzmduCpMXfiUJ GlHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Pi0p+nXF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j10-v6si5257089plg.657.2018.03.15.20.01.08; Thu, 15 Mar 2018 20:01:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Pi0p+nXF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753067AbeCPC7r (ORCPT + 99 others); Thu, 15 Mar 2018 22:59:47 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:42926 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752404AbeCPC7p (ORCPT ); Thu, 15 Mar 2018 22:59:45 -0400 Received: by mail-pg0-f65.google.com with SMTP id x2so3565500pgo.9 for ; Thu, 15 Mar 2018 19:59:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IR+kOcsU6pp5gzPaYsamzvi0MfWkxdTfP2aGThCQ+BQ=; b=Pi0p+nXFc90OnTk7DJRZg9silFCjoIrIuq0PWLhQC2yeieEYIXI7Y367hslzXzlI// LmjItJJRhgHCaanhMoJlvli+n63tbNarCoUPkj3BxI6KU/bu1x13StrI+hJuAmoyZQcX VbYRZECxGfRy+dp87PZe+i3zDtQTCeb+GqTu0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IR+kOcsU6pp5gzPaYsamzvi0MfWkxdTfP2aGThCQ+BQ=; b=FWQOd3FF9+6onM6ZwDtOR3JkyoUCLu/cSFeaPSYlDrqwhXCcmjV7QXsFcHwVlTXrbw lukgYc02KsPFnChPJam4c0cjSKv+LKwr/OTUdexZyv4u9YJ0JLNkgWNEZmgQVPNxT4pB dWNzr+/85lTpGjbNgqhwfHnpP1NhTGs9TJBiiFI4uys1WuXVrZfs0vrEVfMB0emZ0NEs BaVgDxSe5ZTmAA3hXsTOZSsHksGqbbrgrC708CScUoeeteG+6KOSEE04nGddwe5T1iVJ EYsHKJG1nngzefnPstdbGFbLTS7G7ztgD9jK1SL3YssO6DvidIcS6SRcLaK9mmXPG3zn wahg== X-Gm-Message-State: AElRT7FD1pYRdVIfL7OG6313YCrJFTkkj51Popzweqtt3q2Nn0BSktjd m7QuhCCVy43CAgvTF3rbTnERCg== X-Received: by 10.99.186.72 with SMTP id l8mr169199pgu.410.1521169184618; Thu, 15 Mar 2018 19:59:44 -0700 (PDT) Received: from amstan-desktop.mtv.corp.google.com ([2620:0:1000:1501:fc25:2d9b:94b3:3540]) by smtp.gmail.com with ESMTPSA id y3sm10736554pgc.81.2018.03.15.19.59.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Mar 2018 19:59:43 -0700 (PDT) From: Alexandru M Stan To: David Airlie , Rob Herring , Mark Rutland , Archit Taneja , Andrzej Hajda , Laurent Pinchart , Sean Paul Cc: devicetree@vger.kernel.org, Enric Balletbo i Serra , Heiko Stuebner , briannorris@chromium.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, dianders@chromium.org, linux-rockchip@lists.infradead.org, marcheu@chromium.org, hoegsberg@chromium.org, Thierry Escande , Jeffy Chen , Alexandru M Stan , Yakir Yang , Daniel Vetter , Marek Szyprowski , zain wang , Sylwester Nawrocki Subject: [PATCH 2/2] drm/bridge: analogix: Enable EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU Date: Thu, 15 Mar 2018 19:56:59 -0700 Message-Id: <20180316025659.217423-3-amstan@chromium.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20180316025659.217423-1-amstan@chromium.org> References: <20180316025659.217423-1-amstan@chromium.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Configure the DPCD registers for the backlight to respect the pwm frequency of the input. We sometimes don't want it to generate its own. Signed-off-by: Alexandru M Stan --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 48 ++++++++++++++++++++++ drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 1 + 2 files changed, 49 insertions(+) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 5c52307146c7..b830403be8eb 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -916,6 +916,46 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg) return IRQ_HANDLED; } +static int analogix_dp_backlight_pwm_passthru(struct analogix_dp_device *dp) +{ + u8 value; + const u8 expected_cap = DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP | + DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_CAP; + int ret = 0; + + ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_BACKLIGHT_ADJUSTMENT_CAP, + &value); + if (ret != 1) { + DRM_DEV_ERROR(dp->dev, + "backlight PWM passthru: Can't read BACKLIGHT_ADJUSTMENT_CAP\n"); + return ret; + } + + if ((value & expected_cap) != expected_cap) { + DRM_DEV_ERROR(dp->dev, + "panel doesn't support backlight PWM passthru, BACKLIGHT_ADJUSTMENT_CAP=0x%02x\n", + value); + return -1; + } + + ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, + &value); + if (ret != 1) { + DRM_DEV_ERROR(dp->dev, + "backlight PWM passthru: Can't read BACKLIGHT_MODE_SET_REGISTER\n"); + return ret; + } + + value |= DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_ENABLE; + ret = drm_dp_dpcd_writeb(&dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, + value); + if (ret != 1) { + DRM_DEV_ERROR(dp->dev, + "backlight PWM passthru: Can't write BACKLIGHT_MODE_SET_REGISTER\n"); + } + return ret; +} + static void analogix_dp_commit(struct analogix_dp_device *dp) { int ret; @@ -954,6 +994,12 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) dp->psr_enable = analogix_dp_detect_sink_psr(dp); if (dp->psr_enable) analogix_dp_enable_sink_psr(dp); + + if (dp->backlight_pwm_passthru) { + if (analogix_dp_backlight_pwm_passthru(dp) != 1) + DRM_DEV_ERROR(dp->dev, + "Could not enable backlight pwm pin passthru.\n"); + } } /* @@ -1424,6 +1470,8 @@ analogix_dp_bind(struct device *dev, struct drm_device *drm_dev, if (IS_ERR(dp->reg_base)) return ERR_CAST(dp->reg_base); + dp->backlight_pwm_passthru = + of_property_read_bool(dev->of_node, "backlight-pwm-passthru"); dp->force_hpd = of_property_read_bool(dev->of_node, "force-hpd"); dp->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index 6a96ef7e6934..aea51413e78e 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -171,6 +171,7 @@ struct analogix_dp_device { struct phy *phy; int dpms_mode; int hpd_gpio; + bool backlight_pwm_passthru; bool force_hpd; bool psr_enable; bool fast_train_support; -- 2.13.5