Received: by 10.213.65.68 with SMTP id h4csp542508imn; Fri, 16 Mar 2018 10:57:53 -0700 (PDT) X-Google-Smtp-Source: AG47ELvhCvjIrbJHzpULV0Zs+onFOjeX+nnWbT4DZIqOS7cLlwnEe/CeCMLOc4kAhCpcSrNu/FRN X-Received: by 10.101.75.82 with SMTP id k18mr2160992pgt.335.1521223073019; Fri, 16 Mar 2018 10:57:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521223072; cv=none; d=google.com; s=arc-20160816; b=afu7gqIU42pfsRKOaL8Lv63pFCk9FlYhhCbDwqt0vA+ZcduVdppOsvBf/bfs+FjpaP Y+kn9so+1fKb5lwXYiYwruMBnG4HTAGBZe+i+yzQmuGPZgjDWVLF9wQDSecP6CRi0Dxd goRy1xw4FR/l+ssSkQa2w31FglDjUYRnFULBWNmzb55nvnlDI0/aGtc0f9rzJOFdVBVC GwePg6jgpQTbESYkf7xQ8RUh5q62DOrurUCewrBb9sGYco20cLjwZUgG3MdCug+cClyw GQkFq1d+S5UGa6KcVk+kZLNfFe5rY85dQOJK3Tbp87lrD+aSHJatN7GcN+vWmyDqAQxN L4fQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=O3I1tujyhWfcmLb1nvZfHm7kTE64gnrzmsAg+0Dg6ts=; b=OqCs8RJC2HClISIafRdhaaJQYWddo4ig+kgIJkfwEiBZEmj683XzTxcKwNOfymLY9D W4mWUu0a/DqpsdKqqZ07uh8fYwdGg5ikCCioslIqEE3cAFvteEEU+7QJ1+zD3JMDw2yD TEyjvMAq9jYJ2lP0UPBgfMfhdIR4uiVEZM4KZj+9/5J4dpYmxbKPp4wxdrXsN6GarMkL +rWRfLuXgOESX8q68F6C/mLdYIRQ1dG0mpvg/FnhBJDDmlK0yXK7Fj6OKxoB5kB74JGC pnozs+EzZZ+Bxzk23OuRW3Y0GN+H+9y06zLxUGFesbw9lMbrc3fE3AKGRkPfRyxqnSKD aauQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m11-v6si6890802pln.350.2018.03.16.10.57.38; Fri, 16 Mar 2018 10:57:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753275AbeCPR4H (ORCPT + 99 others); Fri, 16 Mar 2018 13:56:07 -0400 Received: from hermes.aosc.io ([199.195.250.187]:52793 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752048AbeCPR4F (ORCPT ); Fri, 16 Mar 2018 13:56:05 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 192A45964B; Fri, 16 Mar 2018 17:56:01 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH 4/7] clk: sunxi-ng: add A64 compatible string Date: Sat, 17 Mar 2018 01:53:51 +0800 Message-Id: <20180316175354.21437-5-icenowy@aosc.io> In-Reply-To: <20180316175354.21437-1-icenowy@aosc.io> References: <20180316175354.21437-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As claiming Allwinner A64 SRAM C is a prerequisite for all sub-blocks of the A64 DE2, not only the CCU sub-block, a bus driver is then written for enabling the access to the whole DE2 part by claiming the SRAM. In this situation, the A64 compatible string will be just added with no other requirments, as they're processed by the parent bus driver. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index 468d1abaf0ee..8df7cd93453e 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -292,13 +292,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { .compatible = "allwinner,sun50i-h5-de2-clk", .data = &sun50i_a64_de2_clk_desc, }, - /* - * The Allwinner A64 SoC needs some bit to be poke in syscon to make - * DE2 really working. - * So there's currently no A64 compatible here. - * H5 shares the same reset line with A64, so here H5 is using the - * clock description of A64. - */ + { + .compatible = "allwinner,sun50i-a64-de2-clk", + .data = &sun50i_a64_de2_clk_desc, + }, { } }; -- 2.15.1