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[209.132.180.67]) by mx.google.com with ESMTP id u16-v6si6905659plq.183.2018.03.16.15.06.58; Fri, 16 Mar 2018 15:07:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752374AbeCPWFd (ORCPT + 99 others); Fri, 16 Mar 2018 18:05:33 -0400 Received: from mga07.intel.com ([134.134.136.100]:52588 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751753AbeCPWF2 (ORCPT ); Fri, 16 Mar 2018 18:05:28 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Mar 2018 15:05:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,317,1517904000"; d="scan'208";a="25368952" Received: from ray.jf.intel.com (HELO [10.7.201.16]) ([10.7.201.16]) by orsmga007.jf.intel.com with ESMTP; 16 Mar 2018 15:05:27 -0700 Subject: Re: [PATCH v12 05/22] selftests/vm: generic function to handle shadow key register To: Ram Pai , shuahkh@osg.samsung.com, linux-kselftest@vger.kernel.org References: <1519264541-7621-1-git-send-email-linuxram@us.ibm.com> <1519264541-7621-6-git-send-email-linuxram@us.ibm.com> Cc: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org, x86@kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, mingo@redhat.com, akpm@linux-foundation.org, benh@kernel.crashing.org, paulus@samba.org, khandual@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, bsingharora@gmail.com, hbabu@us.ibm.com, mhocko@kernel.org, bauerman@linux.vnet.ibm.com, ebiederm@xmission.com, arnd@arndb.de From: Dave Hansen Message-ID: <92951c0a-0468-6d3c-efef-2d9da53fd10f@intel.com> Date: Fri, 16 Mar 2018 15:05:19 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1519264541-7621-6-git-send-email-linuxram@us.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/21/2018 05:55 PM, Ram Pai wrote: > +static inline u32 pkey_to_shift(int pkey) > +{ > + return pkey * PKEY_BITS_PER_PKEY; > +} pkey_bit_position(), perhaps? > +static inline pkey_reg_t reset_bits(int pkey, pkey_reg_t bits) > +{ > + u32 shift = pkey_to_shift(pkey); > + > + return ~(bits << shift); > +} I'd prefer clear_pkey_flags() or maybe clear_pkey_bits(). "reset" can mean "reset to 0" or "reset to 1". Also, why the u32 here? Isn't an int more appropriate? > +static inline pkey_reg_t left_shift_bits(int pkey, pkey_reg_t bits) > +{ > + u32 shift = pkey_to_shift(pkey); > + > + return (bits << shift); > +} > + > +static inline pkey_reg_t right_shift_bits(int pkey, pkey_reg_t bits) > +{ > + u32 shift = pkey_to_shift(pkey); > + > + return (bits >> shift); > +} Some comments on these would be handy. Basically that this takes a per-key flags value and puts it at the right position so it can be shoved in the register.