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[165.84.180.235]) by smtp.gmail.com with ESMTPSA id 2sm1055543pfp.53.2018.03.18.05.48.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 18 Mar 2018 05:48:45 -0700 (PDT) Date: Sun, 18 Mar 2018 07:48:44 -0500 From: Rob Herring To: Fabien Dessenne Cc: Mark Rutland , Maxime Coquelin , Alexandre Torgue , Jassi Brar , Ludovic Barre , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Benjamin Gaignard , Loic Pallardy , Arnaud Pouliquen Subject: Re: [PATCH v2 1/2] dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding Message-ID: <20180318124844.qp4ks2nhijq5gwdb@rob-hp-laptop> References: <1520852307-26659-1-git-send-email-fabien.dessenne@st.com> <1520852307-26659-2-git-send-email-fabien.dessenne@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1520852307-26659-2-git-send-email-fabien.dessenne@st.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 12, 2018 at 11:58:26AM +0100, Fabien Dessenne wrote: > Add a binding for the STMicroelectronics STM32 IPCC block exposing a > mailbox mechanism between two processors. > > Signed-off-by: Fabien Dessenne > Signed-off-by: Ludovic Barre > --- > .../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 ++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/stm32-ipcc.txt Reviewed-by: Rob Herring