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[209.132.180.67]) by mx.google.com with ESMTP id p13-v6si10030512plo.270.2018.03.19.06.03.44; Mon, 19 Mar 2018 06:04:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755524AbeCSNAR convert rfc822-to-8bit (ORCPT + 99 others); Mon, 19 Mar 2018 09:00:17 -0400 Received: from mga02.intel.com ([134.134.136.20]:54845 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755194AbeCSNAN (ORCPT ); Mon, 19 Mar 2018 09:00:13 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Mar 2018 06:00:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,330,1517904000"; d="scan'208";a="209478274" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga005.jf.intel.com with ESMTP; 19 Mar 2018 06:00:12 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 19 Mar 2018 06:00:11 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 19 Mar 2018 06:00:11 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.235]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.226]) with mapi id 14.03.0319.002; Mon, 19 Mar 2018 21:00:10 +0800 From: "Liang, Kan" To: 'Peter Zijlstra' CC: "tglx@linutronix.de" , "mingo@redhat.com" , "linux-kernel@vger.kernel.org" , "acme@kernel.org" , "eranian@google.com" , "ak@linux.intel.com" Subject: RE: [PATCH V6 5/8] perf/x86/intel/uncore: add infrastructure for free running counter Thread-Topic: [PATCH V6 5/8] perf/x86/intel/uncore: add infrastructure for free running counter Thread-Index: AQHTlhkdbIHwBgso+EGyqTzZBmqr86PT9AcAgAMLAJA= Date: Mon, 19 Mar 2018 13:00:09 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F0775385655B@SHSMSX103.ccr.corp.intel.com> References: <1516911228-5293-1-git-send-email-kan.liang@intel.com> <1516911228-5293-5-git-send-email-kan.liang@intel.com> <20180317093438.GI4064@hirez.programming.kicks-ass.net> In-Reply-To: <20180317093438.GI4064@hirez.programming.kicks-ass.net> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzg3YjA2MWItYjQzNS00YjRiLWIyZDItZDZhMzViMzRmMGQ4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImtDWm91MzdJcGxSbG5HV1pBVHdqQVNyTFYwVlhLa2hqMGdDVFJuY0czZlE9In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Thu, Jan 25, 2018 at 12:13:45PM -0800, kan.liang@intel.com wrote: > > @@ -512,6 +538,17 @@ static int uncore_pmu_event_add(struct > perf_event *event, int flags) > > if (!box) > > return -ENODEV; > > > > + /* > > + * The free funning counter is assigned in event_init(). > > + * The free running counter event and free running counter > > + * are 1:1 mapped. It doesn't need to be tracked in event_list. > > + */ > > + if (uncore_pmc_freerunning(hwc->idx)) { > > + if (flags & PERF_EF_START) > > + uncore_pmu_event_start(event, 0); > > + return 0; > > + } > > + > > ret = n = uncore_collect_events(box, event, false); > > if (ret < 0) > > return ret; > > This will result in some (probably) unexpected scheduling artifacts. > Probably the only way to really cure that is to have the free running > counters in their own PMU and not share with the GP counters of this > box. I'm not quite sure what the unexpected scheduling artifacts could be. But, yes, I can move all the free running counters to new PMU for SKX and later platforms. Thanks, Kan