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[209.132.180.67]) by mx.google.com with ESMTP id t23-v6si57169ply.164.2018.03.19.06.18.11; Mon, 19 Mar 2018 06:18:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=JlbNszjc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933147AbeCSNRG (ORCPT + 99 others); Mon, 19 Mar 2018 09:17:06 -0400 Received: from mail-oi0-f65.google.com ([209.85.218.65]:38450 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932584AbeCSNRF (ORCPT ); Mon, 19 Mar 2018 09:17:05 -0400 Received: by mail-oi0-f65.google.com with SMTP id c3so1209885oib.5 for ; Mon, 19 Mar 2018 06:17:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=50aCyBKNiQDmUR4S5gH49IcfwMilfhCz8A025OZRyCo=; b=JlbNszjc5J2gtJNNa0nAbM6RHFjqxkjjmNwdYAbbQU9+mEEB0GSi6RMF+rsvgO4tVF oYZUCkFiqTwLoTNuNTWYQUl3mcyaPe7A2RPbAZ7/y99gvmpCbDRsULPwiTBqKzcD3sIt iHWdWycTgLN7hcqwikhDxyh26d2t/wbHQNukQDTAUpqmRp5HW0wyFnUc6AlfuPW0oDgM vatLxnFXRMhfDWJzqr0sH94bce+T8RkJJzx/DT0du6GQBgvW8jB1rZ1Xq6VXsswEhNCP jYgDsUeq16jjYaOVgSP0wrndOv0fMDgvGVtqb07xvQoof75efjTO7Nqsn9d7dZ+z2sGM oqcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=50aCyBKNiQDmUR4S5gH49IcfwMilfhCz8A025OZRyCo=; b=jsodtEOYTMkfeT9cuBkrFfUUGO+zf6Z08TXHFy4r92rweWPIDMG2hlCoekK3DeexJi cCQbf6lhqNTaRWsf62l2FD+pKAFREJBoKnWd+PFc0CCAC88YhZifjpWaPWGui7ehInKv PrW0JQQBhkckEC7Df5WDGKiBTbLCPZMsKVUa28u+ZDQfvJx+RqLb/qRvqM+vl28S29OZ hf7F0mI+tVemvNGvuyHOj/WWlFwGuUDBBEzK7hbwGVo9Zjj/DdXgMCpXAiNFUm8PcH84 9orh/4UKmbza5Gro+bNaqcEI7Iskow2RMVrXJGv0y1xqztnFR2LWiWAlonuQQ6qMElnY T7Gw== X-Gm-Message-State: AElRT7EXNZKMyv3AHoH+MXbki2SnBzKkvYzCTaFFa9v//iAQqjykg+l0 Ivyz9RmVmrmrtn/ndrBqtdJotomkhWhI3C3Dy/tmqA== X-Received: by 10.202.223.134 with SMTP id w128mr6603861oig.52.1521465422454; Mon, 19 Mar 2018 06:17:02 -0700 (PDT) MIME-Version: 1.0 Received: by 10.74.208.36 with HTTP; Mon, 19 Mar 2018 06:17:01 -0700 (PDT) In-Reply-To: <1521168778-27236-1-git-send-email-david@lechnology.com> References: <1521168778-27236-1-git-send-email-david@lechnology.com> From: Bartosz Golaszewski Date: Mon, 19 Mar 2018 14:17:01 +0100 Message-ID: Subject: =?UTF-8?Q?Re=3A_=5BPATCH_v8_00=2F42=5D_ARM=3A_davinci=3A_convert_to_common?= =?UTF-8?Q?_clock_framework=E2=80=8B?= To: David Lechner Cc: linux-clk@vger.kernel.org, linux-devicetree , arm-soc , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Adam Ford , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-03-16 3:52 GMT+01:00 David Lechner : > This series converts mach-davinci to use the common clock framework. > > The series works like this, the first 19 patches create new clock drivers > using the common clock framework. There are basically 3 groups of clocks - > PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have > unique init data, which is the reason for so many patches. > > Then, starting with "ARM: davinci: pass clock as parameter to > davinci_timer_init()", we get the mach code ready for the switch by adding the > code needed for the new clock drivers and adding #ifndef CONFIG_COMMON_CLK > around the legacy clocks so that we can switch easily between the old and the > new. > > "ARM: davinci: switch to common clock framework" actually flips the switch > to start using the new clock drivers. Then the next 8 patches remove all > of the old clock code. > > The final three patches add device tree clock support to the one SoC that > supports it. > > This series has been tested on LEGO MINDSTORMS EV3 (device tree) and TI > OMAP-L138 LCDK (both device tree and legacy board file). > Hi David, thanks, with the u-boot fix everything seems to work fine. I tested da850-lcdk and da850-evm boards in DT and board file modes. I'll be working with this series in the following days and will do some thorough testing and rebase my aemif series on top of it. I'll also use the recently merged reset support for board files to get rid of the exported reset functions. Thanks for your work! Best regards, Bartosz Golaszewski