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[209.132.180.67]) by mx.google.com with ESMTP id y2-v6si178655plh.649.2018.03.19.08.55.10; Mon, 19 Mar 2018 08:55:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934224AbeCSPw1 convert rfc822-to-8bit (ORCPT + 99 others); Mon, 19 Mar 2018 11:52:27 -0400 Received: from smtp-out6.electric.net ([192.162.217.194]:50695 "EHLO smtp-out6.electric.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934079AbeCSPwW (ORCPT ); Mon, 19 Mar 2018 11:52:22 -0400 Received: from 1exx4r-000STP-Uc by out6e.electric.net with emc1-ok (Exim 4.90_1) (envelope-from ) id 1exx54-000TXH-TO; Mon, 19 Mar 2018 08:52:14 -0700 Received: by emcmailer; Mon, 19 Mar 2018 08:52:14 -0700 Received: from [156.67.243.126] (helo=AcuMS.aculab.com) by out6e.electric.net with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) (Exim 4.90_1) (envelope-from ) id 1exx4r-000STP-Uc; Mon, 19 Mar 2018 08:52:01 -0700 Received: from AcuMS.Aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) by AcuMS.aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 19 Mar 2018 15:53:00 +0000 Received: from AcuMS.Aculab.com ([fe80::43c:695e:880f:8750]) by AcuMS.aculab.com ([fe80::43c:695e:880f:8750%12]) with mapi id 15.00.1347.000; Mon, 19 Mar 2018 15:53:00 +0000 From: David Laight To: 'Thomas Gleixner' CC: 'Rahul Lakkireddy' , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , "mingo@redhat.com" , "hpa@zytor.com" , "davem@davemloft.net" , "akpm@linux-foundation.org" , "torvalds@linux-foundation.org" , "ganeshgr@chelsio.com" , "nirranjan@chelsio.com" , "indranil@chelsio.com" Subject: RE: [RFC PATCH 0/3] kernel: add support for 256-bit IO access Thread-Topic: [RFC PATCH 0/3] kernel: add support for 256-bit IO access Thread-Index: AQHTv43TjMVMzNQoikSg1VH837bpVaPXnqXggAAJp4CAAAH+gIAABvGAgAADNbA= Date: Mon, 19 Mar 2018 15:53:00 +0000 Message-ID: References: <7f0ddb3678814c7bab180714437795e0@AcuMS.aculab.com> <7f8d811e79284a78a763f4852984eb3f@AcuMS.aculab.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.33] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Outbound-IP: 156.67.243.126 X-Env-From: David.Laight@ACULAB.COM X-Proto: esmtps X-Revdns: X-HELO: AcuMS.aculab.com X-TLS: TLSv1.2:ECDHE-RSA-AES256-SHA384:256 X-Authenticated_ID: X-PolicySMART: 3396946, 3397078 X-Virus-Status: Scanned by VirusSMART (s) X-Virus-Status: Scanned by VirusSMART (c) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thomas Gleixner > Sent: 19 March 2018 15:37 ... > > If system call entry reset the AVX registers then any FP save/restore > > would be faster because the AVX registers wouldn't need to be saved > > (and the cpu won't save them). > > I believe the instruction to reset the AVX registers is fast. > > The AVX registers only ever need saving if the process enters the > > kernel through an interrupt. > > Wrong. The x8664 ABI clearly states: > > Linux Kernel code is not allowed to change the x87 and SSE units. If > those are changed by kernel code, they have to be restored properly > before sleeping or leav- ing the kernel. > > That means the syscall interface relies on FPU state being not changed by > the kernel. So if you want to clear AVX on syscall entry you need to save > it first and then restore before returning. That would be a huge > performance hit. The x87 and SSE registers can't be changed - they can contain callee-saved registers. But (IIRC) the AVX and AVX2 registers are all caller-saved. So the system call entry stub functions are allowed to change them. Which means that the syscall entry code can also change them. Of course it must not leak kernel values back to userspace. It is a few years since I looked at the AVX and fpu save code. David