Received: by 10.213.65.68 with SMTP id h4csp1719545imn; Mon, 19 Mar 2018 11:22:07 -0700 (PDT) X-Google-Smtp-Source: AG47ELsqOImX4JikEHgwtEIkTizFY23gyfvXDf9E5MCpn0FOwtj4G035jp7IH5u64C2c1wCwvUZ0 X-Received: by 10.99.102.132 with SMTP id a126mr9621415pgc.385.1521483727919; Mon, 19 Mar 2018 11:22:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521483727; cv=none; d=google.com; s=arc-20160816; b=EnaM7v+TFTW5kNNGVjb4LEr9JtyQLdH9Fuv9EIUVMtKUQ/p0OvVvx+Nv6u/v3tMZ6b UZL0KzkQPiSblPPkRI+jYiF+Wm6VWzUXQB9v21WsYzNvBQHDg/jTEp1UNKk8W6KC28S+ 90rm2XD89pOHAtbzczw8Zgc+cy98lnLseYLkZnrXF4b6h3AYPvtEuEAQblNCfwNMmN0u a79m6ngb5QV9lzgsjpXLDvQ/DybQMNXZVw9SsNJ0ZgFuiXPpnk6q7Bu3IRgYxmIDVpqM 16HpcWs4VMdu8wX5gNLceqpZRCqKv2cATUbXakBXbAXdMQw+3MR4EAXwbFEKt/FzrZHV LaHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=tZoJR/mSiDSLhPaqBX4KDAR2vBhcxRt1nB+3LeahnwI=; b=mV42Crh0o8fFF3h8jGcrOGbeGrUtf16YgbZnCk0+d24qNv/P9nWEAYaHkiLj8lJ3ch ytbs5ydXXQbwMyWcU4Z8tXfvynyQ6HKZ/idRw+yAW+lPLULAbcgARycEc7ognXFwVrZH Y05IEpDWAAmEuEXRXVv1kmO7ZFNt8pltT14Nb9zJkDYMfPfTACnW0epkCQ9yeq3aC18r pH4QJ+qCd21NYSCzwG5ceynANbYqHZ7f6M06WGswh0R/lsMrQK+smFMEAlWlIKSfGMoy Qd5xJz2eIagAjBsenqvNzSAQFwWF63lDsPG3rsWVpwB5m0IUNazSl8ImI3HYFXofWXY7 /Fxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z23-v6si381864plo.272.2018.03.19.11.21.53; Mon, 19 Mar 2018 11:22:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969372AbeCSSTO (ORCPT + 99 others); Mon, 19 Mar 2018 14:19:14 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:46852 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S969136AbeCSSTJ (ORCPT ); Mon, 19 Mar 2018 14:19:09 -0400 Received: from localhost (LFbn-1-12247-202.w90-92.abo.wanadoo.fr [90.92.61.202]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 631731092; Mon, 19 Mar 2018 18:19:08 +0000 (UTC) From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Geert Uytterhoeven , Simon Horman , Sasha Levin Subject: [PATCH 4.9 009/241] ARM: dts: r8a7792: Remove unit-address and reg from integrated cache Date: Mon, 19 Mar 2018 19:04:34 +0100 Message-Id: <20180319180751.560981724@linuxfoundation.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180319180751.172155436@linuxfoundation.org> References: <20180319180751.172155436@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Geert Uytterhoeven [ Upstream commit a0504f0880c11da301dc2b5a5135bd02376e367e ] The Cortex-A15 cache controller is an integrated controller, and thus the device node representing it should not have a unit-addresses or reg property. Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree") Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- arch/arm/boot/dts/r8a7792.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -58,9 +58,8 @@ next-level-cache = <&L2_CA15>; }; - L2_CA15: cache-controller@0 { + L2_CA15: cache-controller-0 { compatible = "cache"; - reg = <0>; cache-unified; cache-level = <2>; power-domains = <&sysc R8A7792_PD_CA15_SCU>;