Received: by 10.213.65.68 with SMTP id h4csp1722471imn; Mon, 19 Mar 2018 11:27:03 -0700 (PDT) X-Google-Smtp-Source: AG47ELtqc6DRIYFPYUor8A+92N4LTeNkufIJgwPTSAlDm/Jj8dddz8hpwdfbIl9/0jFyCJZ3A9LH X-Received: by 2002:a17:902:ac96:: with SMTP id h22-v6mr13214026plr.93.1521484023466; Mon, 19 Mar 2018 11:27:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521484023; cv=none; d=google.com; s=arc-20160816; b=I3a7hNQFyOqUdf5k37bjdy2W/azyk0pic/EDkrp/fXglbqq5dyHQd+CUvZf2hbVFXn psJE4UP5deAk2WfhA+yFpUCg1QKEQecYi8pJ71mQpop5TSPiymsEgc+xm2zt6OqhRLo1 nK9SlxF/VNEvFKI2VJO6JdriiQ97GNxjPBvxIqgmAu1t+9/iyYwZ0hY8fwExYrY01MeZ 7R9TYsezrCDsdVOnTMtvC9cLSvihMyMqOvCYFOR6NYl5co5NKvWqdGehIhwtt9cGzEwW WIiAVLNSeBNm9hep+AxFig8LKzDGOwZF/PuByFMNgCMzP6pz4xJ9mG6T2hvRaG40U4fF qRZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:subject:user-agent:message-id :references:cc:in-reply-to:from:to:content-transfer-encoding :mime-version:dmarc-filter:arc-authentication-results; bh=wrEbVNC8hUqX+CyE2FMJDNMFFUaalWoek9af+OCnG7U=; b=xhGab2sOSMdrqxiiAXXmScrXPoBxQn27M3+Zru+8wiMqzeeSw90yyxgelq5kc0RElL 8evcaSG5sindQzSveNIUyDWEGkr5b1qNv73k8FgnSe8m2AhdCtFLKSejngyAxDzGTbSj y2l7AFjqJUZcmJ6ERffkyl6C3woom7UaHE4ikqXgh3NLmm+zqo5SToXkqxrozlycdn1J m9sN1wM2gJ8azf0wYUqjPhX4aBEab8992RjPOxEvNDhL9tsWcRIzcoeQIhSqDnyuqayR TuVSAS0paD0kuGV5x+UycZyK3YmRvVfcYCv/AstPVtwFRcjBvUDE1PgV22h9p1S+4n7x evXw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u10si304678pgr.164.2018.03.19.11.26.49; Mon, 19 Mar 2018 11:27:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969607AbeCSSYJ convert rfc822-to-8bit (ORCPT + 99 others); Mon, 19 Mar 2018 14:24:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:58298 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031528AbeCSSX5 (ORCPT ); Mon, 19 Mar 2018 14:23:57 -0400 Received: from localhost (unknown [104.132.1.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 53D1A21720; Mon, 19 Mar 2018 18:23:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 53D1A21720 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=sboyd@kernel.org Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Jolly Shah , Rob Herring From: Stephen Boyd In-Reply-To: Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "mturquette@baylibre.com" , "sboyd@codeaurora.org" , "michal.simek@xilinx.com" , Shubhrajyoti Datta , Rajan Vaja , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" References: <1519856861-31384-1-git-send-email-jollys@xilinx.com> <1519856861-31384-3-git-send-email-jollys@xilinx.com> <20180306014549.6t3ae5adzc3cpi5v@rob-hp-laptop> Message-ID: <152148383577.242365.14896728603053993045@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: RE: [PATCH 2/3] dt-bindings: clock: Add bindings for ZynqMP clock driver Date: Mon, 19 Mar 2018 11:23:55 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Jolly Shah (2018-03-13 11:39:13) > Hi Rob, > > > > What is the interface to the "platform management controller"? Because you > > have no registers, I'm guessing a firmware interface? If so, then just define the > > firmware node as a clock provider. > > Yes it is firmware interface. Along with clocks, firmware interface also controls power and pinctrl operations as major. > I am not sure if I understand you correctly. Do you suggest to register clocks through Firmware driver or just use firmware DT node as clock provider and clock driver DT node can reference clocks from FW node to register same? I would suggest making the firmware driver register the clks and act as the clk provider. Not sure what Rob wants.