Received: by 10.213.65.68 with SMTP id h4csp1794610imn; Mon, 19 Mar 2018 13:27:52 -0700 (PDT) X-Google-Smtp-Source: AG47ELu+B8QazEwCDtud64uGe/S3sEvoKYa/O/4zib1WuCck+Owa64HL2k/3IV/sf85617MiSFK+ X-Received: by 2002:a17:902:b288:: with SMTP id u8-v6mr13557221plr.339.1521491272177; Mon, 19 Mar 2018 13:27:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521491272; cv=none; d=google.com; s=arc-20160816; b=FTiDq65WKc9dZQn+t9qUwnNGbDeNiujZqGRhOEuynV7AQStubuuucm7hY95997O3F6 LxwndDPmUcLSe8r1CymnpbqtEB3uVJg+BXfW2+lq7ySusYaK+Mp971j8BzQoTvFfZPk2 G6jQBLi6WQG3UOTSWj199f8ijpi5u3GeXiPyEg9XW3OrIY+k1IKB8m6Y0FfkuYSxhJ9y agxEGH6+cFWYZi+lIuTsQVrkhLQrDfHfsRqJYf0sa6yxXox5ATpx+xbT9vxLioSNRHBw egY0bNIQPOvJ72NJxBna4Bbmz/YlsP86qy2mNTiCvoNY+q72lJcs6nhGigzOZkEhTWRN 2a8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:subject:user-agent:message-id :references:cc:in-reply-to:from:to:content-transfer-encoding :mime-version:dmarc-filter:arc-authentication-results; bh=IM477vH2R5GpECEJg54e/xA1AwKxLj2FQHmylKRRN8Q=; b=CLIQIfMXnEcasPT+MPbIR7N38MwXHIv3kugv3SAndKMVDG/bWMRD6KO2oCqDiqRIBM D466dfeFIzLUfbKZpFMFRg0UDl6+s8Zn5yc+H5Yk2YJgjYPZ2Cm9UVyiu8T9joZfKPyz oukuG2fiSlvkqbGZT3megF3M/sCh8IsGSSJPvi5bB25j/tPekqYY7mm6su05eZ29qwbC 9rH0Rs//eFB32CGg9pwbI1OZ3Htbwq8dNoWx1FKk1qOIUtlSdnuxMJepOO3qgP3JkqQf NA9K6+0z8La9CbasylUQc+GjWAwMoyxobE6TWwPv16EGbz3FcflZI/IaJkMZUWuIUEnz 7wWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z7si3878pge.522.2018.03.19.13.27.38; Mon, 19 Mar 2018 13:27:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031547AbeCSUZl convert rfc822-to-8bit (ORCPT + 99 others); Mon, 19 Mar 2018 16:25:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:34940 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030605AbeCSUZh (ORCPT ); Mon, 19 Mar 2018 16:25:37 -0400 Received: from localhost (unknown [104.132.1.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EFBFA20838; Mon, 19 Mar 2018 20:25:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EFBFA20838 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=sboyd@kernel.org Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: mark.rutland@arm.com, matthias.bgg@gmail.com, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, sboyd@codeaurora.org, sean.wang@mediatek.com From: Stephen Boyd In-Reply-To: Cc: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Wang , stable@vger.kernel.org References: Message-ID: <152149113631.242365.14902026013263544653@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4 Date: Mon, 19 Mar 2018 13:25:36 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting sean.wang@mediatek.com (2018-02-28 19:27:50) > From: Sean Wang > > Just add binding for a fixed-factor clock axisel_d4, which would be > referenced by PWM devices on MT7623 or MT2701 SoC. > > Cc: stable@vger.kernel.org > Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks") > Signed-off-by: Sean Wang > Cc: Rob Herring > Cc: Mark Rutland > Cc: devicetree@vger.kernel.org > --- Applied to clk-next