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[209.132.180.67]) by mx.google.com with ESMTP id r22si362170pfh.230.2018.03.19.18.09.06; Mon, 19 Mar 2018 18:09:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S970582AbeCSSy0 (ORCPT + 99 others); Mon, 19 Mar 2018 14:54:26 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:57022 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935682AbeCSSaU (ORCPT ); Mon, 19 Mar 2018 14:30:20 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D25D380D; Mon, 19 Mar 2018 11:30:19 -0700 (PDT) Received: from [10.1.206.75] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 25F683F25D; Mon, 19 Mar 2018 11:30:18 -0700 (PDT) Subject: Re: [PATCH v2] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening From: Marc Zyngier To: Shanker Donthineni Cc: Will Deacon , linux-kernel , linux-arm-kernel , Catalin Marinas , kvmarm , Christoffer Dall , Vikram Sethi , Sean Campbell , Thomas Speier References: <1520269603-2900-1-git-send-email-shankerd@codeaurora.org> <861sgx5wb6.wl-marc.zyngier@arm.com> Organization: ARM Ltd Message-ID: Date: Mon, 19 Mar 2018 18:30:16 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <861sgx5wb6.wl-marc.zyngier@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/03/18 10:32, Marc Zyngier wrote: > On Mon, 05 Mar 2018 17:06:43 +0000, > Shanker Donthineni wrote: >> >> The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC >> V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses >> the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead >> of Silicon provider service ID 0xC2001700. >> >> Signed-off-by: Shanker Donthineni >> --- >> Chnages since v1: >> - Trivial change in cpucaps.h (refresh after removing ARM64_HARDEN_BP_POST_GUEST_EXIT) >> >> arch/arm64/include/asm/cpucaps.h | 5 ++-- >> arch/arm64/include/asm/kvm_asm.h | 2 -- >> arch/arm64/kernel/bpi.S | 8 ------ >> arch/arm64/kernel/cpu_errata.c | 55 ++++++++++++++-------------------------- >> arch/arm64/kvm/hyp/entry.S | 12 --------- >> arch/arm64/kvm/hyp/switch.c | 10 -------- >> 6 files changed, 21 insertions(+), 71 deletions(-) > > Reviewed-by: Marc Zyngier > > Will/Catalin, if you want to take it via the arm64 tree, that's fine > by me. Please allow me to change my mind. This is going to conflict horribly with the VHE rework and the HYP randomization patches. I'll take it via the KVM tree, which will make everyone's life a lot easier. Thanks, M. -- Jazz is not dead. It just smells funny...