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[209.132.180.67]) by mx.google.com with ESMTP id n20si396468pgv.214.2018.03.19.18.53.13; Mon, 19 Mar 2018 18:53:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S971739AbeCSU6a (ORCPT + 99 others); Mon, 19 Mar 2018 16:58:30 -0400 Received: from mga14.intel.com ([192.55.52.115]:62511 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965581AbeCSSIv (ORCPT ); Mon, 19 Mar 2018 14:08:51 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Mar 2018 11:08:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,331,1517904000"; d="scan'208";a="39330569" Received: from chang-linux.sc.intel.com ([143.183.85.144]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2018 11:08:50 -0700 From: "Chang S. Bae" To: x86@kernel.org Cc: luto@kernel.org, ak@linux.intel.com, hpa@zytor.com, markus.t.metzger@intel.com, tony.luck@intel.com, ravi.v.shankar@intel.com, linux-kernel@vger.kernel.org, chang.seok.bae@intel.com Subject: [PATCH 04/15] x86/fsgsbase/64: Factor out load FS/GS segments from __switch_to Date: Mon, 19 Mar 2018 10:49:16 -0700 Message-Id: <1521481767-22113-5-git-send-email-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521481767-22113-1-git-send-email-chang.seok.bae@intel.com> References: <1521481767-22113-1-git-send-email-chang.seok.bae@intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Instead of open code, load_fsgs() will cleanup __switch_to and symmetric with FS/GS segment save. When FSGSBASE enabled, X86_FEATURE_FSGSBASE check will be incorporated. Signed-off-by: Chang S. Bae Reviewed-by: Andi Kleen Cc: Andy Lutomirski Cc: H. Peter Anvin --- arch/x86/kernel/process_64.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 2375f10..4488f07 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -265,6 +265,15 @@ static __always_inline void load_seg_legacy(unsigned short prev_index, } } +static __always_inline void load_fsgs(struct thread_struct *prev, + struct thread_struct *next) +{ + load_seg_legacy(prev->fsindex, prev->fsbase, + next->fsindex, next->fsbase, FS); + load_seg_legacy(prev->gsindex, prev->gsbase, + next->gsindex, next->gsbase, GS); +} + static unsigned long task_seg_base(struct task_struct *task, unsigned short selector) { @@ -574,10 +583,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) if (unlikely(next->ds | prev->ds)) loadsegment(ds, next->ds); - load_seg_legacy(prev->fsindex, prev->fsbase, - next->fsindex, next->fsbase, FS); - load_seg_legacy(prev->gsindex, prev->gsbase, - next->gsindex, next->gsbase, GS); + load_fsgs(prev, next); switch_fpu_finish(next_fpu, cpu); -- 2.7.4