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[209.132.180.67]) by mx.google.com with ESMTP id c8si867909pgt.225.2018.03.20.01.40.09; Tue, 20 Mar 2018 01:40:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e7WvX2jC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752368AbeCTIhV (ORCPT + 99 others); Tue, 20 Mar 2018 04:37:21 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:37598 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752277AbeCTIgu (ORCPT ); Tue, 20 Mar 2018 04:36:50 -0400 Received: by mail-pg0-f68.google.com with SMTP id n11so364548pgp.4 for ; Tue, 20 Mar 2018 01:36:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FqNDPU7XDHgqYln04xz6NNajOLlzDycLuV3GQjd3moY=; b=e7WvX2jC1YEAenChWvqTktLFytAMSOX9rCmU7R8NzN8Dthidlpe7gfQvTVUaGG1ld6 6zGLrWZpe1jjrI3yhQz+JQWDFBapMo9KAFL5IuvH+g8yh+eQffYb/5IxIPVybIuGJfJX ly2TwAbkDj2+QuMro5ESWDFo43Rh4n68+LpRI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FqNDPU7XDHgqYln04xz6NNajOLlzDycLuV3GQjd3moY=; b=momWIZystXJrn9Uy8v5XQ5LiqlPywfECuOjQq7Db2aZqdLo2z6xM2ozRsHjbefNbDx 5IdKIb09NzGxijfzg+GjbqPXqu8b+FYOloh5HwZYo7k/6wi5ZriUo4bRJswUenYC01O9 j2KfB39N7z4MSYweLNQhtNairCLKExyh6n0Ij7O6x2TL+z74KK2m9aUCGvVbCjrk3GZk SEfHsASwbIIpEzQBooqbYzcqMEE9OS7dmFb18tiMsCrqYuYIHJcV24tBquC5UR5fbZc1 UbRNQ1HlkMNd25llc3IJUmxPm4maTs00DwisWxGeWc4LmjuHQCMCTB/72BXNaSoCZMz6 jrwA== X-Gm-Message-State: AElRT7F5H+xiv3Q8LqGDXGlT0ZSQuApfDwbHwRhNEtWjluAhG9roSXVc 8AJIsGRV+RFEjWBCVxaQQ2D+KA== X-Received: by 10.98.225.9 with SMTP id q9mr1336538pfh.23.1521535010126; Tue, 20 Mar 2018 01:36:50 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id q62sm2590048pfd.61.2018.03.20.01.36.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Mar 2018 01:36:49 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Billows Wu , Chunyan Zhang Subject: [PATCH 2/3] mmc: sdhci: made changes for SDMA System Address register Date: Tue, 20 Mar 2018 16:36:25 +0800 Message-Id: <1521534986-21907-3-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521534986-21907-1-git-send-email-zhang.chunyan@linaro.org> References: <1521534986-21907-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to the SD host controller specification version 4.10, when Host Version 4 is enabled, SDMA uses ADMA System Address register (05Fh-058h) instead of using SDMA System Address register to support both 32-bit and 64-bit addressing. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index da4d91e..748a3a3 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -805,6 +805,7 @@ static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) { u8 ctrl; + u32 reg; struct mmc_data *data = cmd->data; if (sdhci_data_line_cmd(cmd)) @@ -894,8 +895,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) SDHCI_ADMA_ADDRESS_HI); } else { WARN_ON(sg_cnt != 1); + reg = host->v4_mode ? SDHCI_ADMA_ADDRESS : + SDHCI_DMA_ADDRESS; sdhci_writel(host, sdhci_sdma_address(host), - SDHCI_DMA_ADDRESS); + reg); } } @@ -2721,6 +2724,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) */ if (intmask & SDHCI_INT_DMA_END) { u32 dmastart, dmanow; + u32 reg; dmastart = sdhci_sdma_address(host); dmanow = dmastart + host->data->bytes_xfered; @@ -2733,7 +2737,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) host->data->bytes_xfered = dmanow - dmastart; DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n", dmastart, host->data->bytes_xfered, dmanow); - sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); + reg = host->v4_mode ? SDHCI_ADMA_ADDRESS : + SDHCI_DMA_ADDRESS; + sdhci_writel(host, dmanow, reg); } if (intmask & SDHCI_INT_DATA_END) { -- 2.7.4