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[209.132.180.67]) by mx.google.com with ESMTP id v65si876486pgv.807.2018.03.20.04.47.40; Tue, 20 Mar 2018 04:47:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=c8XztDlw; dkim=pass header.i=@codeaurora.org header.s=default header.b=myGrS5Rf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753091AbeCTLqM (ORCPT + 99 others); Tue, 20 Mar 2018 07:46:12 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:52198 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753054AbeCTLqK (ORCPT ); Tue, 20 Mar 2018 07:46:10 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id C602A60F6C; Tue, 20 Mar 2018 11:46:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521546369; bh=jTsWA6ypQtCH+tCjf/DX4Td4ZFyQH+39cR4my9QAvtQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c8XztDlwFbpShn6FSaeXM25IS8QIauQPARX0hL4su1Fw3aWx0dojGDIeI4cFo+Ja2 EEV5fAlhs8eOM2Rm2Gosedm1LC61ZoRm6JJQcAshgSxS1kdPTtO4yEA1/2gm24RMDR z4tA2KWpuO4myfLuVg8oJhSmsfyaM/XNfFnflF3E= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from cpandya-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cpandya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id DE2BB60F5C; Tue, 20 Mar 2018 11:45:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521546368; bh=jTsWA6ypQtCH+tCjf/DX4Td4ZFyQH+39cR4my9QAvtQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=myGrS5RfMMgKUNt/r2RrT4rlLDhfNsEFsxaQUMtzzY2yav0rHLNmSm6ab/e5TP/BD iVVaw/miq7O1JxKspshKRKDDIazoEbPWFt1qe0O124Rossh8zM1lUpSDl+zlXG0zW9 w2t+thL2+wT5INiz1Wprq4DfFFbyMZtEVZR51a6s= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DE2BB60F5C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=cpandya@codeaurora.org From: Chintan Pandya To: catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com Cc: arnd@arndb.de, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, james.morse@arm.com, kristina.martsenko@arm.com, takahiro.akashi@linaro.org, gregkh@linuxfoundation.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, akpm@linux-foundation.org, toshi.kani@hpe.com, Chintan Pandya Subject: [PATCH v4 2/3] arm64: Implement page table free interfaces Date: Tue, 20 Mar 2018 17:15:13 +0530 Message-Id: <1521546314-31753-3-git-send-email-cpandya@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521546314-31753-1-git-send-email-cpandya@codeaurora.org> References: <1521546314-31753-1-git-send-email-cpandya@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement pud_free_pmd_page() and pmd_free_pte_page(). Implementation requires, 1) Freeing of the un-used next level page tables 2) Clearing off the current pud/pmd entry 3) Invalidate TLB which could have previously valid but not stale entry Signed-off-by: Chintan Pandya --- arch/arm64/mm/mmu.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index da98828..7be3106 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -45,6 +45,7 @@ #include #include #include +#include #define NO_BLOCK_MAPPINGS BIT(0) #define NO_CONT_MAPPINGS BIT(1) @@ -973,12 +974,47 @@ int pmd_clear_huge(pmd_t *pmdp) return 1; } +static int __pmd_free_pte_page(pmd_t *pmd, unsigned long addr, bool tlb_inv) +{ + pmd_t *table; + + if (pmd_val(*pmd)) { + table = __va(pmd_val(*pmd)); + pmd_clear(pmd); + /* + * FIXME: __flush_tlb_pgtable(&init_mm, addr) is + * ideal candidate here, which exactly + * flushes intermediate pgtables. But, + * this is broken (evident from tests). + * So, use safe TLB op unless that is fixed. + */ + if (tlb_inv) + flush_tlb_kernel_range(addr, addr + PMD_SIZE); + + free_page((unsigned long) table); + } + return 1; +} + int pud_free_pmd_page(pud_t *pud, unsigned long addr) { - return pud_none(*pud); + pmd_t *table; + int i; + + if (pud_val(*pud)) { + table = __va(pud_val(*pud)); + for (i = 0; i < PTRS_PER_PMD; i++) + __pmd_free_pte_page(&table[i], addr + (i * PMD_SIZE), + false); + + pud_clear(pud); + flush_tlb_kernel_range(addr, addr + PUD_SIZE); + free_page((unsigned long) table); + } + return 1; } int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) { - return pmd_none(*pmd); + return __pmd_free_pte_page(pmd, addr, true); } -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project