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[209.132.180.67]) by mx.google.com with ESMTP id p65si1229414pfa.323.2018.03.20.05.43.39; Tue, 20 Mar 2018 05:43:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=o3pioGKD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753231AbeCTMme (ORCPT + 99 others); Tue, 20 Mar 2018 08:42:34 -0400 Received: from galahad.ideasonboard.com ([185.26.127.97]:33840 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753170AbeCTMm3 (ORCPT ); Tue, 20 Mar 2018 08:42:29 -0400 Received: from avalon.localnet (unknown [IPv6:2a02:2788:664:35f:7f37:41ef:e87f:aea9]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 217EA202DC; Tue, 20 Mar 2018 13:40:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1521549607; bh=g6Y9V9i35QTgKQqPV+DuTkWAgw1viiEHhPcZ5ggh/og=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o3pioGKDGLYsKzoN+ZfXC/82xp3MmpSr56waTaaDp/YMNxp4Il1RE3aNT6zSrxTUi pHph7BSf25tzclbZSQmAXi0Yf/yFKabMqSqy2rWAMcFLbIRd/fbjB/ID/zibv9Gl/t Kvz1qoRzS++AKkfVp+eivdMTjVnNOGh3IPGhx8ec= From: Laurent Pinchart To: Jacopo Mondi Cc: architt@codeaurora.org, a.hajda@samsung.com, airlied@linux.ie, horms@verge.net.au, magnus.damm@gmail.com, geert@linux-m68k.org, niklas.soderlund@ragnatech.se, sergei.shtylyov@cogentembedded.com, robh+dt@kernel.org, mark.rutland@arm.com, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org Subject: Re: [PATCH v6 1/3] dt-bindings: display: bridge: Document THC63LVD1024 LVDS decoder Date: Tue, 20 Mar 2018 14:43:33 +0200 Message-ID: <4060923.7DxT9ae38L@avalon> Organization: Ideas on Board Oy In-Reply-To: <1521213399-31947-2-git-send-email-jacopo+renesas@jmondi.org> References: <1521213399-31947-1-git-send-email-jacopo+renesas@jmondi.org> <1521213399-31947-2-git-send-email-jacopo+renesas@jmondi.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jacopo, (CC'ing Rob) Thank you for the patch. On Friday, 16 March 2018 17:16:37 EET Jacopo Mondi wrote: > Document Thine THC63LVD1024 LVDS decoder device tree bindings. >=20 > Signed-off-by: Jacopo Mondi > Reviewed-by: Andrzej Hajda > Reviewed-by: Niklas S=F6derlund > --- > .../bindings/display/bridge/thine,thc63lvd1024.txt | 66 ++++++++++++++++= +++ > 1 file changed, 66 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt >=20 > diff --git > a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt > b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt > new file mode 100644 > index 0000000..8225c6a > --- /dev/null > +++ > b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt > @@ -0,0 +1,66 @@ > +Thine Electronics THC63LVD1024 LVDS decoder > +------------------------------------------- > + > +The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS > streams > +to parallel data outputs. The chip supports single/dual input/output mod= es, > +handling up to two two input LVDS stream and up to two digital CMOS/TTL > outputs. > + > +Single or dual operation modes, output data mapping and DDR output modes > are > +configured through input signals and the chip does not expose any control > bus. > + > +Required properties: > +- compatible: Shall be "thine,thc63lvd1024" > + > +Optional properties: > +- vcc-supply: Power supply for TTL output and digital circuitry > +- cvcc-supply: Power supply for TTL CLOCKOUT signal > +- lvcc-supply: Power supply for LVDS inputs > +- pvcc-supply: Power supply for PLL circuitry As explained in a comment to one of the previous versions of this series, I= 'm=20 tempted to make vcc-supply mandatory and drop the three other power supplie= s=20 for now, as I believe there's very little chance they will be connected to= =20 separately controllable regulators (all supplies use the same voltage). In = the=20 very unlikely event that this occurs in design we need to support in the=20 future, the cvcc, lvcc and pvcc supplies can be added later as optional=20 without breaking backward compatibility. Apart from that, Reviewed-by: Laurent Pinchart > +- pdwn-gpios: Power down GPIO signal. Active low > +- oe-gpios: Output enable GPIO signal. Active high > + > +The THC63LVD1024 video port connections are modeled according > +to OF graph bindings specified by > Documentation/devicetree/bindings/graph.txt > + > +Required video port nodes: > +- Port@0: First LVDS input port > +- Port@2: First digital CMOS/TTL parallel output > + > +Optional video port nodes: > +- Port@1: Second LVDS input port > +- Port@3: Second digital CMOS/TTL parallel output > + > +Example: > +-------- > + > + thc63lvd1024: lvds-decoder { > + compatible =3D "thine,thc63lvd1024"; > + > + vcc-supply =3D <®_lvds_vcc>; > + lvcc-supply =3D <®_lvds_lvcc>; > + > + pdwn-gpio =3D <&gpio4 15 GPIO_ACTIVE_LOW>; > + > + ports { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + port@0 { > + reg =3D <0>; > + > + lvds_dec_in_0: endpoint { > + remote-endpoint =3D <&lvds_out>; > + }; > + }; > + > + port@2{ > + reg =3D <2>; > + > + lvds_dec_out_2: endpoint { > + remote-endpoint =3D <&adv7511_in>; > + }; > + > + }; > + > + }; > + }; =2D-=20 Regards, Laurent Pinchart