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From:   David Laight <David.Laight@ACULAB.COM>
To:     'Rahul Lakkireddy' <rahul.lakkireddy@chelsio.com>,
        Thomas Gleixner <tglx@linutronix.de>
CC:     "x86@kernel.org" <x86@kernel.org>,
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        "davem@davemloft.net" <davem@davemloft.net>,
        "akpm@linux-foundation.org" <akpm@linux-foundation.org>,
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        Ganesh GR <ganeshgr@chelsio.com>,
        Nirranjan Kirubaharan <nirranjan@chelsio.com>,
        Indranil Choudhury <indranil@chelsio.com>
Subject: RE: [RFC PATCH 2/3] x86/io: implement 256-bit IO read and write
Thread-Topic: [RFC PATCH 2/3] x86/io: implement 256-bit IO read and write
Thread-Index: AQHTwE/Xw7n4cdHVjE+3sRSKJWyME6PZMJwQ
Date:   Tue, 20 Mar 2018 14:40:19 +0000
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From: Rahul Lakkireddy
> Sent: 20 March 2018 13:32
...
> On High Availability Server, the logs of the failing system must be
> collected as quickly as possible.  So, we're concerned with the amount
> of time taken to collect our large on-chip memory.  We see improvement
> in doing 256-bit reads at a time.

Two other options:

1) Get the device to DMA into host memory.

2) Use mmap() (and vm_iomap_memory() in your driver) to get direct
   userspace access to the (I assume) PCIe memory space.
   You can then use whatever copy instructions the cpu has.
   (Just don't use memcpy().)

	David