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[209.132.180.67]) by mx.google.com with ESMTP id b5-v6si3375312plk.567.2018.03.20.22.31.35; Tue, 20 Mar 2018 22:31:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=uXBnuY0s; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751689AbeCUF3k (ORCPT + 99 others); Wed, 21 Mar 2018 01:29:40 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:54340 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751533AbeCUF3g (ORCPT ); Wed, 21 Mar 2018 01:29:36 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2L5TFWn015469; Wed, 21 Mar 2018 00:29:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1521610155; bh=WBztPRuU312GGNUrsrd9kZlY63kao4shskCP7vcNSqU=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=uXBnuY0sYkJzNBDT4OyvrVA8D/GapMQmV+SAIbCB4GS/bzhJVL4IT/Gx2NC0bqWoB 3Y1POv+IElrNWq8qy1ZDEQWiOib2dEL2MzlLnJARKNL8pn/T7Uk0ZpIhZbVX9K8dk8 4ayouoSkJ7gkbo+ZEl8hw6GlgrWnJqu08MaopGEw= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2L5TFHe005060; Wed, 21 Mar 2018 00:29:15 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Wed, 21 Mar 2018 00:29:15 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Wed, 21 Mar 2018 00:29:14 -0500 Received: from [172.24.190.233] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2L5TBwb014577; Wed, 21 Mar 2018 00:29:12 -0500 Subject: Re: [PATCH v4 1/5] PCI: endpoint: BAR width should not depend on sizeof dma_addr_t To: Niklas Cassel , Lorenzo Pieralisi , Bjorn Helgaas , Sekhar Nori , John Keeping , Shawn Lin , Niklas Cassel , Cyrille Pitchen References: <20180308133331.19464-1-niklas.cassel@axis.com> <20180308133331.19464-2-niklas.cassel@axis.com> CC: , From: Kishon Vijay Abraham I Message-ID: <825d8376-915c-ee4d-1a1e-d3430e5d0928@ti.com> Date: Wed, 21 Mar 2018 10:59:11 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20180308133331.19464-2-niklas.cassel@axis.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 08 March 2018 07:03 PM, Niklas Cassel wrote: > If a BAR supports 64-bit width or not depends on the hardware, > and should thus not depend on sizeof(dma_addr_t). > > Since this driver is generic, default to always using BAR width > of 32-bits. 64-bit BARs can easily be tested by replacing > PCI_BASE_ADDRESS_MEM_TYPE_32 with PCI_BASE_ADDRESS_MEM_TYPE_64 > in bar_flags. > > Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I > --- > Note to Lorenzo/Bjorn: > It is not trivial to convert the bar_size + bar_flags + > struct pci_epf->bar member array to an array of struct resources, > since we need to be able to store the addresses returned > by dma_alloc_coherent(), which is of type dma_addr_t. > struct resource uses resource_size_t, which is defined as phys_addr_t. > E.g. ARTPEC-7 uses 64-bit dma_addr_t, but only 32-bit phys_addr_t. > > drivers/pci/endpoint/functions/pci-epf-test.c | 15 +++++++++------ > 1 file changed, 9 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c > index 800da09d9005..7c70433b11a7 100644 > --- a/drivers/pci/endpoint/functions/pci-epf-test.c > +++ b/drivers/pci/endpoint/functions/pci-epf-test.c > @@ -71,6 +71,14 @@ struct pci_epf_test_data { > }; > > static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 }; > +static int bar_flags[] = { > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, > + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32 > +}; > > static int pci_epf_test_copy(struct pci_epf_test *epf_test) > { > @@ -358,7 +366,6 @@ static void pci_epf_test_unbind(struct pci_epf *epf) > > static int pci_epf_test_set_bar(struct pci_epf *epf) > { > - int flags; > int bar; > int ret; > struct pci_epf_bar *epf_bar; > @@ -367,15 +374,11 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) > struct pci_epf_test *epf_test = epf_get_drvdata(epf); > enum pci_barno test_reg_bar = epf_test->test_reg_bar; > > - flags = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32; > - if (sizeof(dma_addr_t) == 0x8) > - flags |= PCI_BASE_ADDRESS_MEM_TYPE_64; > - > for (bar = BAR_0; bar <= BAR_5; bar++) { > epf_bar = &epf->bar[bar]; > ret = pci_epc_set_bar(epc, epf->func_no, bar, > epf_bar->phys_addr, > - epf_bar->size, flags); > + epf_bar->size, bar_flags[bar]); > if (ret) { > pci_epf_free_space(epf, epf_test->reg[bar], bar); > dev_err(dev, "failed to set BAR%d\n", bar); >