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[209.132.180.67]) by mx.google.com with ESMTP id n16-v6si4112878pll.669.2018.03.21.09.07.03; Wed, 21 Mar 2018 09:07:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=YD5+0aSD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752717AbeCUQFC (ORCPT + 99 others); Wed, 21 Mar 2018 12:05:02 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:38591 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751691AbeCUQE7 (ORCPT ); Wed, 21 Mar 2018 12:04:59 -0400 Received: by mail-yw0-f195.google.com with SMTP id x20so838757ywg.5; Wed, 21 Mar 2018 09:04:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=SFhSk7QMvZYKB4pjarBt3gx3C261uTALH/faBHphBM4=; b=YD5+0aSDV6nohaOLcsQVMSzl1wwOiyfytqiTePig5dDsCVHj1c7x+8xt2vTdqb2Yog vqSItbn54CvGn7W8hZXpYKTBPhybOk9JogKMfzTiyEDlP0teUGTtUeIEyXoiasEGhRR8 uLo9UxHbcmlMnrbxmE2rlBD3iwjy5njB+VT4Fh223Ec+hp288z07jrY32MWe1th7rpeL PDNov7kjXNWqFmgWG8yBYhNlE5vE1VwrsqTkdU9TIUVVFAIVJdsxoaR9fo1jxInIuKbG XHFwu64iv14Qpp0X5H51/QX/xTY8qsufy+dqfzGuB/xH+sJiYAb2buUMzfqSb7u2PyMC nV2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=SFhSk7QMvZYKB4pjarBt3gx3C261uTALH/faBHphBM4=; b=ccqcwgvahj6iG8tLRqaa9EhHvG697+CzIvus2M588VhD++C+uaSrI62J+uIh+9yEfT zzRXjY6c2jB3L/dOFeBbmQ4UqR2PndQ1pfe33Y2Tc+MQJIXojzaCsNqTi9DtwGwuFMhw ZqAw2EdBY5JE8r7rt/x/KcO29fvCnHj7BBMiGiY+dMPE7OsgLdqHkjEyOMPNA0Qidr84 0L+Z6q+oWGZJmDl8RFvbyLwJfN7AG8XGbpzofZ/8kbVTYYXpNCIObLdf0AlLVafXyydp oaIZBg1hFG/rF4IhNxZx8FIhK+cDVnnIytaAeetWOZZnyjvcgoKEi59LtswK9W56J1JB mv1A== X-Gm-Message-State: AElRT7GbHGEJONnnf8/qdwS7oBO0XahyeoWk9YN0m1z+6WKFiX7MpOWg dbNsHZ6bOLT2ThrXBgz0/SQ= X-Received: by 10.13.221.68 with SMTP id g65mr12257666ywe.273.1521648298915; Wed, 21 Mar 2018 09:04:58 -0700 (PDT) Received: from sophia ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id g77sm1664873ywe.79.2018.03.21.09.04.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Mar 2018 09:04:57 -0700 (PDT) Date: Wed, 21 Mar 2018 12:04:50 -0400 From: William Breathitt Gray To: Andy Shevchenko Cc: Linus Walleij , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , linux-iio@vger.kernel.org Subject: Re: [PATCH v3 2/8] gpio: 104-idio-16: Implement get_multiple callback Message-ID: <20180321160450.GA21405@sophia> References: <486eb9bad0440ed305a78d9fc990728cbeb7d43e.1521301345.git.vilhelm.gray@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 21, 2018 at 05:32:03PM +0200, Andy Shevchenko wrote: >On Sat, Mar 17, 2018 at 5:50 PM, William Breathitt Gray > wrote: >> The ACCES I/O 104-IDIO-16 series of devices provides 16 >> optically-isolated digital inputs accessed via two 8-bit ports. Since >> eight input lines are acquired on a single port input read, the >> 104-IDIO-16 GPIO driver may improve multiple input reads by utilizing a >> get_multiple callback. This patch implements the >> idio_16_gpio_get_multiple function which serves as the respective >> get_multiple callback. > >> +static int idio_16_gpio_get_multiple(struct gpio_chip *chip, >> + unsigned long *mask, unsigned long *bits) >> +{ >> + struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); >> + >> + *bits = 0; > >> + if (*mask & 0xFF0000) > >GENMASK(23, 16) ? > >> + *bits |= (unsigned long)inb(idio16gpio->base + 1) << 16; > >Do you need casting? > >> + if (*mask & 0xFF000000) > >GENMASK(31, 24) ? > >Alternative (and for above): > >(*mask >> 24) & 0xff > >(*mask >> 16) & 0xff That's a good suggestion since GENMASK would be useful in making it clear which bits we are actually checking; the literal bitmasks such as 0xFF000000 can be difficult to read at a glance. I'll incorporate GENMASK into a version 4 release of this patch. > > >> + *bits |= (unsigned long)inb(idio16gpio->base + 5) << 24; > >Do you need casting? The inb function returns a u8, which is typically a typedef of an unsigned char. Since u8 only guaranteed a range of 8 bits, we require a cast to unsigned long to guarantee that the left shifted value stays intact as a 32-bit unsigned value rather than wrap around an 8-bit unsigned range. William Breathitt Gray > >> + >> + return 0; >> +} >> + >> static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value) >> { >> struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); >> @@ -244,6 +258,7 @@ static int idio_16_probe(struct device *dev, unsigned int id) >> idio16gpio->chip.direction_input = idio_16_gpio_direction_input; >> idio16gpio->chip.direction_output = idio_16_gpio_direction_output; >> idio16gpio->chip.get = idio_16_gpio_get; >> + idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple; >> idio16gpio->chip.set = idio_16_gpio_set; >> idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple; >> idio16gpio->base = base[id]; >> -- >> 2.16.2 >> > > > >-- >With Best Regards, >Andy Shevchenko